summaryrefslogtreecommitdiff
path: root/src/arch/riscv/sbi.c
diff options
context:
space:
mode:
authorJulius Werner <jwerner@chromium.org>2019-03-05 16:53:33 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-08 08:33:24 +0000
commitcd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch)
tree8e89136e2da7cf54453ba8c112eda94415b56242 /src/arch/riscv/sbi.c
parentb3a8cc54dbaf833c590a56f912209a5632b71f49 (diff)
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/riscv/sbi.c')
-rw-r--r--src/arch/riscv/sbi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c
index e5408288af..a5f3fd4065 100644
--- a/src/arch/riscv/sbi.c
+++ b/src/arch/riscv/sbi.c
@@ -45,7 +45,7 @@ static uintptr_t sbi_set_timer(uint64_t when)
return 0;
}
-#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
+#if CONFIG(CONSOLE_SERIAL)
static uintptr_t sbi_console_putchar(uint8_t ch)
{
uart_tx_byte(CONFIG_UART_FOR_CONSOLE, ch);
@@ -86,7 +86,7 @@ void handle_sbi(trapframe *tf)
ret = sbi_set_timer(arg0);
#endif
break;
-#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
+#if CONFIG(CONSOLE_SERIAL)
case SBI_CONSOLE_PUTCHAR:
ret = sbi_console_putchar(arg0);
break;