diff options
author | Jonathan Zhang <jonzhang@fb.com> | 2020-10-28 11:35:40 -0700 |
---|---|---|
committer | Marc Jones <marc@marcjonesconsulting.com> | 2020-10-30 18:53:20 +0000 |
commit | cbbce66baf6fccb7d0fb4f2bf9cb6e456c432c49 (patch) | |
tree | eb6533a86e0efce9c5889de6dda73dd766bf0d05 /src/arch/riscv/pmp.c | |
parent | 2e9315c4c666f7c49a90298723ec043f79371602 (diff) |
cpu/x86: increase timeout for CPUs to check in after 2nd SIPI
Increase timeout for CPUs to check in after 2nd SIPI completion
from 10ms to 100ms.
Update logging level for mp init failure cases from BIOS_DEBUG
to BIOS_ERR.
Without this patch, "mp initialization failure" happens on some
reboots on DeltaLake server. As consequence, not all 52 cpus
come up in Linux:
[root@localhost ~]# lscpu
...
CPU(s): 40
Also following Hardware Errors are seen:
[ 4.365762] mce: [Hardware Error]: Machine check events logged
[ 4.366565] mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 9: ee2000000003110a
[ 4.367561] mce: [Hardware Error]: TSC 0 ADDR fe9e0000 MISC 228aa040101086
[ 4.368563] mce: [Hardware Error]: PROCESSOR 0:5065b TIME 948438164 SOCKET 0 APIC 0 microcode 700001d
With this patch, no such failure is observed with 370 reboots.
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Iab10f116dd4af152c24d5d8f999928c038a5b208
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46898
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/pmp.c')
0 files changed, 0 insertions, 0 deletions