diff options
| author | Xiang Wang <wxjstz@126.com> | 2018-07-19 17:35:39 +0800 |
|---|---|---|
| committer | ron minnich <rminnich@gmail.com> | 2019-02-02 16:53:21 +0000 |
| commit | 820dcfceb3901dbb00bb90c876e374126ca14e20 (patch) | |
| tree | 2f0ba3f1038291f9dda7755680551cbe425f7922 /src/arch/riscv/Makefile.inc | |
| parent | c47d43a8af5dfdbdb7afebb39f999f18f36c9d23 (diff) | |
riscv: Simplify payload handling
1. Simplify payload code and convert it to C
2. Save the FDT pointer to HLS (hart-local storage).
3. Don't use mscratch to pass FDT pointer as it is used for exception handling.
Change-Id: I32bf2a99e07a65358a7f19b899259f0816eb45e8
Signed-off-by: Xiang Wang <wxjstz@126.com>
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/31179
Reviewed-by: ron minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/Makefile.inc')
| -rw-r--r-- | src/arch/riscv/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index e4c8468ef0..9d91f0cefe 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -137,7 +137,7 @@ ramstage-y += misc.c ramstage-y += smp.c ramstage-y += boot.c ramstage-y += tables.c -ramstage-y += payload.S +ramstage-y += payload.c ramstage-$(ARCH_RISCV_PMP) += pmp.c ramstage-y += \ $(top)/src/lib/memchr.c \ |