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authorGreg Watson <gwatson@lanl.gov>2005-10-20 01:44:21 +0000
committerGreg Watson <gwatson@lanl.gov>2005-10-20 01:44:21 +0000
commit8d4edc2fcd003990228f505ce717c32b45831f2d (patch)
tree3024ed9def3ae2572c42d45facf5cf7259325f6c /src/arch/ppc/include/ppc74xx.h
parent58cb0bf1dfe1fa39760c3edcc68146fe6ed9d474 (diff)
changes to support new ppc arch
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/ppc/include/ppc74xx.h')
-rwxr-xr-xsrc/arch/ppc/include/ppc74xx.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/ppc/include/ppc74xx.h b/src/arch/ppc/include/ppc74xx.h
index 121efbe28d..2dfeb5ab21 100755
--- a/src/arch/ppc/include/ppc74xx.h
+++ b/src/arch/ppc/include/ppc74xx.h
@@ -30,3 +30,15 @@
#define HID0_SGE 0x00000080
#define HID0_BTIC 0x00000020
#define HID0_BHT 0x00000004
+
+/*----------------------------------------------------------------------------+
+| Machine State Register. MSR_EE, MSR_PR, MSR_FP, MSR_ME, MSR_FE0, MSR_FE1,
++----------------------------------------------------------------------------*/
+#define MSR_APE 0x00080000 /* wait state enable */
+#define MSR_WE 0x00040000 /* wait state enable */
+#define MSR_CE 0x00020000 /* critical interrupt enable */
+#define MSR_DWE 0x00000400 /* debug wait enable */
+#define MSR_DE 0x00000200 /* debug interrupt enable */
+#define MSR_IR 0x00000020 /* instruction relocale */
+#define MSR_DR 0x00000010 /* data relocale */
+