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| author | Marc Jones <marc.jones@scarletltd.com> | 2017-06-18 17:33:30 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-31 17:29:35 +0000 |
| commit | 257db58bdb06994e6082afff047e1a3d2ad8fe9a (patch) | |
| tree | d620d4ec0fa210c2b49a4bf076e6e3a3bb73cb9f /src/arch/mips/include | |
| parent | 583806a79d36a2aff5cb6069150ebe173130b00e (diff) | |
soc/amd/stoneyridge: Add GNVS
Add ACPI asl for global non-volatile storage (GNVS).
Change-Id: I9ecab92181bfe60e7b6c6e91ffb9fa843345352f
Signed-off-by: Marc Jones <marc.jones@scarletltd.com>
Reviewed-on: https://review.coreboot.org/20275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/mips/include')
0 files changed, 0 insertions, 0 deletions