diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-08-28 09:46:10 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:04:14 +0100 |
| commit | 127f051f86a3f3f1c1df889f2838123481a37b2f (patch) | |
| tree | 19a8211f8735673573052fe0a58de70d7aa72bac /src/arch/mips/bootblock.ld | |
| parent | 79eb2b3ec6c0b38c6aeaf9a78ab3cb2de9cfcee7 (diff) | |
tegra132: add spin table support
Until PSCI is functional the other core still needs to be
brought up in the kernel. The kernel boots these cpus with
the spin table which is just an address in memory to monitor
a jump location.
BUG=chrome-os-partner:31545
BRANCH=None
TEST=Built and brought up secondary core in linux.
Change-Id: Iaa69110f6a647d8fd4149119d97db4fc45d7da00
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 01ca36685852bc5dd85fd4015c8a1e600e23e7ca
Original-Change-Id: Ieaf19cd70aff3e6c8de932e04b1b5aba71822a97
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/214777
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9021
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/mips/bootblock.ld')
0 files changed, 0 insertions, 0 deletions