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authorAaron Durbin <adurbin@chromium.org>2014-09-03 13:19:46 -0500
committerPatrick Georgi <pgeorgi@google.com>2015-03-27 08:04:40 +0100
commitc913a9c076ce91cda20a59d199c8286a6dded0d0 (patch)
tree1bfbf0d344d1307d1f67e2c6353d00224ae9f639 /src/arch/arm64/armv8
parentb90cd4db4038f6d1eed1f5f17b5835f1e3e88ebd (diff)
arm64: add midr_el1 accessor function
Provide access to the MIDR_EL1 register to obtain the main id for determining CPU implementer and part/revision information. BUG=chrome-os-partner:31761 BRANCH=None TEST=Built and printed the output of this function on ryu. Change-Id: I42cec75072fc5e8b48f63c1971840fdc415e4326 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ad19ffe629d9f16b8fd07051ce73533e97fb3f5c Original-Change-Id: I8b8506ebff8e6f9d7c4f96d7ff7e21803972961e Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/216423 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9032 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm64/armv8')
-rw-r--r--src/arch/arm64/armv8/lib/sysctrl.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/arm64/armv8/lib/sysctrl.c b/src/arch/arm64/armv8/lib/sysctrl.c
index deb991f520..2737f56ad2 100644
--- a/src/arch/arm64/armv8/lib/sysctrl.c
+++ b/src/arch/arm64/armv8/lib/sysctrl.c
@@ -522,6 +522,16 @@ void raw_write_mair_current(uint64_t mair)
SWITCH_CASE_WRITE(raw_write_mair,mair);
}
+/* MIDR */
+uint32_t raw_read_midr_el1(void)
+{
+ uint32_t midr_el1;
+
+ __asm__ __volatile__("mrs %0, MIDR_EL1\n\t" : "=r" (midr_el1) : : "memory");
+
+ return midr_el1;
+}
+
/* MPIDR */
uint64_t raw_read_mpidr_el1(void)
{