diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2015-02-06 19:13:34 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-17 10:04:28 +0200 |
| commit | 4e158bcbac427b58f09fa94e22014592cf606adb (patch) | |
| tree | 5d31c227d745970fab20875d0cd1b1801aa047a1 /src/arch/arm/armv7 | |
| parent | f61809ab38ddde631586da7c1345c8dc787174f4 (diff) | |
armv7: work around hang in bootblock startup code
broadcom cygnus hangs if we clean caches by dcache_clean_invalidate_all
at bootblock entry point. this change makes startup code call
dcache_invalidate_all instead.
other boards theoretically should not be affected as long as maskrom
does not hand off execution to bootblock with dirty cache.
BUG=chrome-os-partner:36648,chrome-os-partner:36691
BRANCH=broadcom-firmware
TEST=boot cygnus b0 board, messages were printed on console:
coreboot-688aae9-dirty bootblock Mon Feb 9 13:21:02 PST 2015
starting...
Exception handlers installed.
Change-Id: I05777ca525c97bb3d7cbb5ea7e872a602dcd5a19
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 59de5328df9d0502a3b3f7c624d3e86e038de50e
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Change-Id: I9b8850846b941e7e62712e90cc28ad14a68da393
Original-Reviewed-on: https://chromium-review.googlesource.com/251304
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9762
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm/armv7')
| -rw-r--r-- | src/arch/arm/armv7/cpu.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/armv7/cpu.S b/src/arch/arm/armv7/cpu.S index 589bc07405..b7f245b85d 100644 --- a/src/arch/arm/armv7/cpu.S +++ b/src/arch/arm/armv7/cpu.S @@ -120,7 +120,7 @@ ENTRY(arm_init_caches) mcr p15, 0, r4, c1, c0, 0 /* Flush and invalidate dcache in ascending order */ - bl dcache_clean_invalidate_all + bl dcache_invalidate_all /* Deactivate MMU (0), Alignment Check (1) and DCache (2) */ and r4, # ~(1 << 0) & ~(1 << 1) & ~(1 << 2) |