summaryrefslogtreecommitdiff
path: root/src/arch/arm/armv7/cache.c
diff options
context:
space:
mode:
authorFelix Singer <felixsinger@posteo.net>2021-12-30 01:35:49 +0100
committerFelix Singer <felixsinger@posteo.net>2021-12-31 08:51:53 +0000
commitfe62d6911e9f437ed9f867d7bc848c3ea227d349 (patch)
tree6837a25bc449abce3a8ca495f0315ad7c7bb0940 /src/arch/arm/armv7/cache.c
parent5e5c14b36dd9688349afc33a03426ea6702412cc (diff)
mb/google/jecht/acpi: Replace Add(a,b,c) with ASL 2.0 syntax
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: Ie7fa132623c7834e3d2f1acda032928579819a84 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60489 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/arch/arm/armv7/cache.c')
0 files changed, 0 insertions, 0 deletions