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authorWisley Chen <wisley.chen@quanta.corp-partner.google.com>2022-01-05 19:23:07 +0600
committerFelix Held <felix-coreboot@felixheld.de>2022-01-07 15:28:32 +0000
commit08351d27273c15953018395b2eb3fb297a5103b1 (patch)
tree18fde7f61e63bb4acb0973510e99b06a94e32940 /spd/lp4x/set-0/spd-4.hex
parent060e89f347a4799edcf51bbd2147d39e2f601d19 (diff)
mb/google/brya/var/anahera: Fine tune I2C frequency
Fine tune i2c frequency. I2C0 - 399.6 kHz I2C1 - 391.4 kHz I2C3 - 398.1 kHz I2C5 - 399.9 kHz BUG=b:213295817 TEST=build Change-Id: I9a89820a8d9ae4c9b4ee499e8467426e0670656d Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60792 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'spd/lp4x/set-0/spd-4.hex')
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