diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-05-18 12:26:40 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-05-26 01:26:31 +0000 |
| commit | afa39105d8e09e5bc9ce2053b10a40839ab9fddd (patch) | |
| tree | f91dd504481261abae734b52eb12c6c46028a925 /payloads/libpayload/arch/x86/string.c | |
| parent | 4244527d8ccf2256c567ec4c4091c5edad72d06c (diff) | |
libpayload: Add x86_64 (64-bit) support
This patch introduces x86_64 (64-bit) support to the payload, building
upon the existing x86 (32-bit) architecture. Files necessary for 64-bit
compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig
option.
BUG=b:242829490
TEST=Able to verify all valid combinations between coreboot and
payload with this patch.
Payload Entry Point Behavior with below code.
+----------------+--------------------+----------------------------+
| LP_ARCH_X86_64 | Payload Entry Mode | Description |
+----------------+--------------------+----------------------------+
| No | 32-bit | Direct protected mode init |
+----------------+--------------------+----------------------------+
| Yes | 32-bit | Protected to long mode |
+----------------+--------------------+----------------------------+
| Yes | 64-bit | Long mode initialization |
+----------------+--------------------+----------------------------+
Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81968
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads/libpayload/arch/x86/string.c')
| -rw-r--r-- | payloads/libpayload/arch/x86/string.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/payloads/libpayload/arch/x86/string.c b/payloads/libpayload/arch/x86/string.c index 836d049831..11bcae7acb 100644 --- a/payloads/libpayload/arch/x86/string.c +++ b/payloads/libpayload/arch/x86/string.c @@ -81,6 +81,16 @@ void *memcpy(void *dest, const void *src, size_t n) { unsigned long d0, d1, d2; +#if CONFIG(LP_ARCH_X86_64) + asm volatile( + "rep ; movsq\n\t" + "mov %4,%%rcx\n\t" + "rep ; movsb\n\t" + : "=&c" (d0), "=&D" (d1), "=&S" (d2) + : "0" (n >> 3), "g" (n & 7), "1" (dest), "2" (src) + : "memory" + ); +#else asm volatile( "rep ; movsl\n\t" "movl %4,%%ecx\n\t" @@ -89,6 +99,7 @@ void *memcpy(void *dest, const void *src, size_t n) : "0" (n >> 2), "g" (n & 3), "1" (dest), "2" (src) : "memory" ); +#endif return dest; } |