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authorStefan Reinauer <reinauer@chromium.org>2011-06-22 16:39:19 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2011-10-21 23:34:30 +0200
commitd1bc331855caab351a70676b5085787292a45fea (patch)
tree8d0ddcf777c4b7330e02495982f1f718f56d27fc /payloads/libpayload/arch/powerpc
parentb6010b8e70c25f93773bc464457f69fd4bb8a82e (diff)
Extend coreboot table entry for serial ports
Add information about memory mapped/io mapped base addresses. and fix up libpayload to use the same structures Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb Reviewed-on: http://review.coreboot.org/261 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'payloads/libpayload/arch/powerpc')
-rw-r--r--payloads/libpayload/arch/powerpc/coreboot.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/payloads/libpayload/arch/powerpc/coreboot.c b/payloads/libpayload/arch/powerpc/coreboot.c
index ee1842c82f..7da87ed2f2 100644
--- a/payloads/libpayload/arch/powerpc/coreboot.c
+++ b/payloads/libpayload/arch/powerpc/coreboot.c
@@ -77,7 +77,9 @@ static void cb_parse_memory(unsigned char *ptr, struct sysinfo_t *info)
static void cb_parse_serial(unsigned char *ptr, struct sysinfo_t *info)
{
struct cb_serial *ser = (struct cb_serial *)ptr;
- info->ser_ioport = ser->ioport;
+ if (ser->type != CB_SERIAL_TYPE_IO_MAPPED)
+ return;
+ info->ser_ioport = ser->baseaddr;
}
#ifdef CONFIG_NVRAM