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| author | Marc Jones <marcj303@gmail.com> | 2017-11-09 12:25:02 -0700 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2017-11-13 17:36:51 +0000 |
| commit | 290a59284e97498f6cc879ec5638af87d4538b80 (patch) | |
| tree | fd6ad0732a0475ac789fe3cbb691426140a59f27 /payloads/libpayload/arch/mips/exception_asm.S | |
| parent | 31c8cdda73461f59a29457e482934cd686feed39 (diff) | |
soc/amd/stoneyridge: Add CPU PPKG ASL
Add PPKG Method for processor passive thermal control list.
BUG=b:67999819
Change-Id: I5d84832af06f64c923485926e4e0c73c65a2b0b2
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22399
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'payloads/libpayload/arch/mips/exception_asm.S')
0 files changed, 0 insertions, 0 deletions