diff options
| author | Jimmy Huang <jimmy.huang@mediatek.com> | 2015-09-15 15:29:10 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-28 09:36:32 +0000 |
| commit | c159a0ec4a41a4243df60a1a94c1d4848f6492c5 (patch) | |
| tree | 8c811e24aac1d151e47a4baabb608b044ba8356a /payloads/libpayload/arch/arm64 | |
| parent | bf7b5bc64a6f4cef485f2c78607835d20e7f2e5d (diff) | |
arm64: mmu: Prevent CPU prefetch instructions from device memory
Set XN bit of block upper attribute to device memory in mmu. CPU may
speculatively prefetch instructions from device memory, but the IO
subsystem of some implementation may not support this operation. Set
this attribute to device memory mmu entries can prevent CPU from
prefetching device memory.
BRANCH=none
BUG=none
TEST=build and booted to kernel on oak-rev3 with dcm enabled.
Change-Id: I52ac7d7c84220624aaf6a48d64b9110d7afeb293
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7b01a4157cb046a5e75ea7625060a602e7a63c3c
Original-Change-Id: Id535e990a23b6c89123b5a4e64d7ed21eebed607
Original-Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/302301
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11722
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'payloads/libpayload/arch/arm64')
| -rw-r--r-- | payloads/libpayload/arch/arm64/mmu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/payloads/libpayload/arch/arm64/mmu.c b/payloads/libpayload/arch/arm64/mmu.c index e2a0cb18b6..f07e4c435c 100644 --- a/payloads/libpayload/arch/arm64/mmu.c +++ b/payloads/libpayload/arch/arm64/mmu.c @@ -91,6 +91,7 @@ static uint64_t get_block_attr(unsigned long tag) break; case TYPE_DEV_MEM: attr |= BLOCK_INDEX_MEM_DEV_NGNRNE << BLOCK_INDEX_SHIFT; + attr |= BLOCK_XN; break; case TYPE_DMA_MEM: attr |= BLOCK_INDEX_MEM_NORMAL_NC << BLOCK_INDEX_SHIFT; |