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authorAamir Bohra <aamir.bohra@intel.com>2018-04-19 18:03:46 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-03-07 17:20:26 +0000
commit34508cd9ac51021721f3e9abfe2a69c8a9835a4b (patch)
tree81dce468e15444049764c4e7fa22fad545419e22 /payloads/coreinfo/COPYING
parent553967256fa9941feae6c0044b09c5c8b87c398a (diff)
soc/intel/icelake: Add PM timer emulation support in ICL
CPU PM TIMER EMULATION logic will help UEFI payload to execute rather wait for time tick in absence of TCO and ACPI PM timer after FSP-S. BUG=N/A TEST=Able to build and boot with tianocore payload. Change-Id: I7fd11e728b7a14f41f08bc39bcd92a42a8aa6cff Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31609 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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