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| author | Anil Kumar <anil.kumar.k@intel.com> | 2021-04-08 18:11:01 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-28 16:24:41 +0000 |
| commit | b46ec389bd5606327b72142a4a1dcf5d3a271381 (patch) | |
| tree | a1c4c5d769636ce7ed022c629be8f9f7680bd750 /Documentation/mainboard | |
| parent | 3ad24c7137650fe194e9edae55f5d3ce6de0a270 (diff) | |
mb/intel/adlrvp_m: Add UART0 GPIO config for ADL-M RVP
This patch adds UART0 config in early GPIO table
Branch=None
Test=Build coreboot and boot on ADLRVP-M board. Check UART logs
Signed-off-by: Anil Kumar <anil.kumar.k@intel.com>
Change-Id: Ic0cc955a02936b74f44fed55a9f4b8054646681a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52201
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Reviewed-by: Varshit B Pandya <varshit.b.pandya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard')
0 files changed, 0 insertions, 0 deletions