diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-08-26 15:53:00 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-02 07:17:39 +0000 |
| commit | d16ef4d21ea7efcad97b49bc2633caa4342ecbea (patch) | |
| tree | eb835ba99e157772ddd315c575c5f75fb3b031f7 /Documentation/mainboard/libretrend | |
| parent | bd2da5a4b560b96501e343b04fb1e0e189da55cc (diff) | |
util/ifdtool: Fix SPI frequency as per Gen11 SPI flash guide
BUG=b:153888802
TEST=Able to list correct SPI frequency as per TGL SPI flash guide
Without this CL :
Found Component Section
FLCOMP 0x093030f6
Dual Output Fast Read Support: not supported
Read ID/Read Status Clock Frequency: 33MHz
Write/Erase Clock Frequency: 33MHz
Fast Read Clock Frequency: 33MHz
Fast Read Support: supported
Read Clock Frequency: 20MHz
With this CL :
Found Component Section
FLCOMP 0x093030f6
Dual Output Fast Read Support: not supported
Read ID/Read Status Clock Frequency: 50MHz
Write/Erase Clock Frequency: 50MHz
Fast Read Clock Frequency: 50MHz
Fast Read Support: supported
Read Clock Frequency: 20MHz
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Id0a0a0cbd948ef8334cf522c09e881b464e87f0e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44819
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/libretrend')
0 files changed, 0 insertions, 0 deletions