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authorRaul E Rangel <rrangel@chromium.org>2020-06-04 16:36:33 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:41:44 +0000
commitbe2b5ac0eac915cc37e2cc366725e9fdf634ef12 (patch)
tree766591f9af6a6dcc651272cf52f78965fa4da9bd /Documentation/mainboard/intel
parentf9b9166431d758a6bed27008fc49f752b499f83d (diff)
soc/amd/picasso: Use MSR_CSTATE_ADDRESS
This is a standard MSR. No reason for picasso to define its own. BUG=b:147042464 TEST=Boot to OS on trembyle Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Idcfae356d35ff08ced4b7e5ccfc132a8492a6824 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42087 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/intel')
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