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| author | Hannah Williams <hannah.williams@intel.com> | 2017-06-12 14:03:18 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-16 16:15:13 +0200 |
| commit | 63142153bae35e1a8852224df7c2695eed42bd67 (patch) | |
| tree | a21f7cfcfe2ccb7f82f95bee32a8a11772c905e6 /Documentation/beginverbatim.tex | |
| parent | ea6f7006325cbff9f5d7306a18656c6b5d321a4c (diff) | |
soc/intel/common/block/cse: Add GLK PCI ID
Change-Id: I88e376d61c4aba5030a0be7c8bdfe7b57881a197
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/20169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'Documentation/beginverbatim.tex')
0 files changed, 0 insertions, 0 deletions