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author | Angel Pons <th3fanbus@gmail.com> | 2020-07-22 11:43:10 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-03 05:27:28 +0000 |
commit | 0a760cd05b55755510a5672af3a1712a34a7e3aa (patch) | |
tree | fe4c1f04cf8e0044dcd10331f10ae83c8bf315b9 /Documentation/AMD-S3.txt | |
parent | 0ddc2459bcbea812227b3b8b4fa5019e9a27da11 (diff) |
nb/intel/pineview/hostbridge_regs.h: Clean up registers
Sort them by ascending offsets.
Tested with BUILD_TIMELESS=1, Foxconn D41S does not change.
Change-Id: I521aa3e49b17a9fb6b279ae758801356e510d054
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'Documentation/AMD-S3.txt')
0 files changed, 0 insertions, 0 deletions