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authorKane Chen <kane.chen@intel.com>2014-07-28 10:54:40 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-27 09:55:25 +0100
commitebbb0d4105d7df2358ef572677a39147c577d7c5 (patch)
tree195961adfc09776d4d2f35d8193fa69d7c9c8582
parent33faac643d8cbd521668f163df0a83865435e8c9 (diff)
broadwell: add support for smbios type17 in broadwell
This change also depends on mrc due to changes in pei_data.h Report smbios type 17 for each memory CQ-DEPEND=CL:210005 BUG=None BRANCH=None TEST=Compiles successfully See smbios type17 in OS by dmidecode Original-Change-Id: If83c99364726cd17c719a59ed8ac993736c63b9a Original-Signed-off-by: Kane Chen <kane.chen@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/210399 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> (cherry picked from commit 6da6b4ffb3a45fdd766b88220c2adb168b3c5e10) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I39ea9ef9b342239fe26846ab0a928f6a680c21e8 Reviewed-on: http://review.coreboot.org/8956 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/soc/intel/broadwell/broadwell/pei_data.h2
-rw-r--r--src/soc/intel/broadwell/romstage/raminit.c6
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/broadwell/pei_data.h b/src/soc/intel/broadwell/broadwell/pei_data.h
index 19b4451f89..a805163546 100644
--- a/src/soc/intel/broadwell/broadwell/pei_data.h
+++ b/src/soc/intel/broadwell/broadwell/pei_data.h
@@ -30,6 +30,7 @@
#define PEI_DATA_H
#include <types.h>
+#include <memory_info.h>
#define PEI_VERSION 21
@@ -177,6 +178,7 @@ struct pei_data
/* Data from MRC that should be saved to flash */
void *data_to_save;
int data_to_save_size;
+ struct memory_info meminfo;
} __attribute__((packed));
typedef struct pei_data PEI_DATA;
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index 7217bb9539..b8b88bc339 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -46,6 +46,7 @@
void raminit(struct pei_data *pei_data)
{
const struct mrc_saved_data *cache;
+ struct memory_info* mem_info;
pei_wrapper_entry_t entry;
int ret;
@@ -124,4 +125,9 @@ void raminit(struct pei_data *pei_data)
if (pei_data->data_to_save != NULL && pei_data->data_to_save_size > 0)
mrc_cache_stash_data(pei_data->data_to_save,
pei_data->data_to_save_size);
+
+ printk(BIOS_DEBUG, "create cbmem for dimm information\n");
+ mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info));
+ memcpy(mem_info, &pei_data->meminfo, sizeof(struct memory_info));
+
}