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authorFelix Held <felix-coreboot@felixheld.de>2022-11-22 17:18:21 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-12-08 18:01:38 +0000
commite1f6db512f540363588cb3c3cd77702ad5759821 (patch)
treedf3d7f168aab11c4159751a1d504f5bf13665b5b
parent7969a5c1b46ba73dce96b3dbd302d59f20331a81 (diff)
vc/amd/fsp/cezanne/FspmUpd: don't use pointers for usb_phy configuration
The size of a pointer changes between a 32 and 64 bit coreboot build. In order to be able to use a 32 bit FSP in a 64 bit coreboot build, change the pointer in the UPDs to a uint32_t to always have a 32 bit field in the UPD for this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I81f3a38344f91cecb4fe5431ed211834e5ed599c Reviewed-on: https://review.coreboot.org/c/coreboot/+/69897 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/amd/cezanne/fsp_m_params.c11
-rw-r--r--src/vendorcode/amd/fsp/cezanne/FspmUpd.h3
2 files changed, 11 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c
index f370331764..f86be94f0d 100644
--- a/src/soc/amd/cezanne/fsp_m_params.c
+++ b/src/soc/amd/cezanne/fsp_m_params.c
@@ -4,6 +4,7 @@
#include <amdblocks/ioapic.h>
#include <amdblocks/memmap.h>
#include <assert.h>
+#include <console/console.h>
#include <console/uart.h>
#include <device/device.h>
#include <fsp/api.h>
@@ -156,9 +157,15 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
lcl_usb_phy.Version_Major = FSP_USB_STRUCT_MAJOR_VERSION;
lcl_usb_phy.Version_Minor = FSP_USB_STRUCT_MINOR_VERSION;
lcl_usb_phy.TableLength = sizeof(struct usb_phy_config);
- mcfg->usb_phy = &lcl_usb_phy;
+ if ((uintptr_t)&lcl_usb_phy <= UINT32_MAX) {
+ mcfg->usb_phy_ptr = (uint32_t)(uintptr_t)&lcl_usb_phy;
+ } else {
+ printk(BIOS_ERR, "USB PHY config struct above 4GB; can't pass USB PHY "
+ "configuration to 32 bit FSP.\n");
+ mcfg->usb_phy_ptr = 0;
+ }
} else {
- mcfg->usb_phy = NULL;
+ mcfg->usb_phy_ptr = 0;
}
if (config->edp_phy_override) {
diff --git a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h
index 38aa36cb07..92dbb239d4 100644
--- a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h
+++ b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h
@@ -94,7 +94,8 @@ typedef struct __packed {
/** Offset 0x04CF**/ uint32_t telemetry_vddcrsocfull_scale_current;
/** Offset 0x04D3**/ uint32_t telemetry_vddcrsocOffset;
/** Offset 0x04D7**/ uint8_t UnusedUpdSpace1;
- /** Offset 0x04D8**/ struct usb_phy_config *usb_phy;
+ /* usb_phy_ptr is actually struct usb_phy_config *, but that won't work for 64bit coreboot */
+ /** Offset 0x04D8**/ uint32_t usb_phy_ptr;
/** Offset 0x04DC**/ uint8_t edp_phy_override;
/** Offset 0x04DD**/ uint8_t edp_physel;
/** Offset 0x04DE**/ uint8_t dp_vs_pemph_level;