diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-06-22 15:18:07 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2021-07-02 08:19:10 +0000 |
commit | 6f5a6581a61706b0b271ff16845fd0cefe46928b (patch) | |
tree | 53d856256dd67a3675f4f445245d4b0fe8f0672e | |
parent | de62f55507b6ca4f98df3edd75b57e73814c1f2d (diff) |
src: Introduce `ARCH_ALL_STAGES_X86`
Introduce the `ARCH_ALL_STAGES_X86` Kconfig symbol to automatically
select the per-stage arch options. Subsequent commits will leverage
this to allow choosing between 32-bit and 64-bit coreboot where all
stages are x86. AMD Picasso and AMD Cezanne are the only exceptions
to this rule: they disable `ARCH_ALL_STAGES_X86` and explicitly set
the per-stage arch options accordingly.
Change-Id: Ia2ddbae8c0dfb5301352d725032f6ebd370428c9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
36 files changed, 11 insertions, 33 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 1003376dee..2a42a1c7c7 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -28,6 +28,7 @@ config ARCH_RAMSTAGE_X86_32 config ARCH_ALL_STAGES_X86_32 bool + default ARCH_ALL_STAGES_X86 && !ARCH_ALL_STAGES_X86_64 select ARCH_BOOTBLOCK_X86_32 select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 @@ -58,6 +59,10 @@ config ARCH_ALL_STAGES_X86_64 select ARCH_ROMSTAGE_X86_64 select ARCH_RAMSTAGE_X86_64 +config ARCH_ALL_STAGES_X86 + bool + default y + config ARCH_X86_64_PGTBL_LOC hex "x86_64 page table location in CBFS" depends on ARCH_BOOTBLOCK_X86_64 diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index f71b8ede8b..15622c94e6 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -6,7 +6,6 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_TN default y if CPU_AMD_AGESA_FAMILY16_KB default n - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select DRIVERS_AMD_PI select TSC_SYNC_LFENCE diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index 4cc6902dee..aff8d7dc97 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -4,7 +4,6 @@ config CPU_AMD_PI bool default y if CPU_AMD_PI_00730F01 default n - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select DRIVERS_AMD_PI select TSC_SYNC_LFENCE diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 1c91941181..9830305783 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -6,7 +6,6 @@ if CPU_INTEL_HASWELL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES select MMX diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 6ddb99ede4..a710e67acd 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -1,6 +1,5 @@ config CPU_INTEL_MODEL_1067X bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index 9f59b4711f..ac45cfafe2 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -1,6 +1,5 @@ config CPU_INTEL_MODEL_106CX bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index f539247dcf..731ea3743d 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -5,7 +5,6 @@ if CPU_INTEL_MODEL_2065X config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES select SSE2 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 9a0d792431..67fd701c35 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -10,7 +10,6 @@ config ARCH_EXP_X86_64 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64 select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64 select ARCH_X86 select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig index f9d123603d..6d41d94f57 100644 --- a/src/cpu/intel/model_65x/Kconfig +++ b/src/cpu/intel/model_65x/Kconfig @@ -1,5 +1,4 @@ config CPU_INTEL_MODEL_65X bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig index 2fce135615..26a303be01 100644 --- a/src/cpu/intel/model_67x/Kconfig +++ b/src/cpu/intel/model_67x/Kconfig @@ -1,5 +1,4 @@ config CPU_INTEL_MODEL_67X bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig index 67d4b775fd..796290770f 100644 --- a/src/cpu/intel/model_68x/Kconfig +++ b/src/cpu/intel/model_68x/Kconfig @@ -2,6 +2,5 @@ config CPU_INTEL_MODEL_68X bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index 418f9bd658..14274a3236 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -1,5 +1,4 @@ config CPU_INTEL_MODEL_6BX bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index 240cee6e70..c7d54c5f8c 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -1,6 +1,5 @@ config CPU_INTEL_MODEL_6EX bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index 048178a81d..499972600a 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -1,6 +1,5 @@ config CPU_INTEL_MODEL_6FX bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig index eb2268a890..e05cf89517 100644 --- a/src/cpu/intel/model_6xx/Kconfig +++ b/src/cpu/intel/model_6xx/Kconfig @@ -1,5 +1,4 @@ config CPU_INTEL_MODEL_6XX bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index e1708ba90a..672cf75517 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -1,6 +1,5 @@ config CPU_INTEL_MODEL_F2X bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS select SMM_ASEG diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index 151a8e7509..b0a9f7ce64 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -1,6 +1,5 @@ config CPU_INTEL_MODEL_F3X bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_COMMON diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index 2d31655de3..550a978e85 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -1,5 +1,4 @@ config CPU_INTEL_MODEL_F4X bool - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 440d8cb4ae..6d897fe501 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -57,5 +57,4 @@ config CPU_QEMU_X86_32 bool default n if CPU_QEMU_X86_64 default y - select ARCH_ALL_STAGES_X86_32 endif diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 78db12fc70..7dd3447234 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -70,6 +70,9 @@ config SOC_SPECIFIC_OPTIONS select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI +config ARCH_ALL_STAGES_X86 + default n + config SOC_AMD_COMMON_BLOCK_UCODE_SIZE default 5568 diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 44728a8a80..42c3bfc029 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -69,6 +69,9 @@ config CPU_SPECIFIC_OPTIONS select UDK_2017_BINDING select HAVE_CF9_RESET +config ARCH_ALL_STAGES_X86 + default n + config SOC_AMD_COMMON_BLOCK_UCODE_SIZE default 3200 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 0e80f14fc4..821d1ee216 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -10,7 +10,6 @@ if SOC_AMD_STONEYRIDGE config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_SOC_NVS - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/example/min86/Kconfig b/src/soc/example/min86/Kconfig index 66c0e8b3e2..660bf369e7 100644 --- a/src/soc/example/min86/Kconfig +++ b/src/soc/example/min86/Kconfig @@ -14,7 +14,6 @@ if SOC_EXAMPLE_MIN86 config SOC_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select NO_MONOTONIC_TIMER select NO_MMCONF_SUPPORT diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 3c49748f65..4cb512ad85 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -13,7 +13,6 @@ if SOC_INTEL_ALDERLAKE config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 5b743c67af..d81015e762 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -24,7 +24,6 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NO_PCAT_8259 - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 6c5610da63..305e5b7c20 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -8,7 +8,6 @@ if SOC_INTEL_BAYTRAIL config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES select BOOT_DEVICE_SUPPORTS_WRITES diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 7301d6327c..8ccf0432bc 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -8,7 +8,6 @@ if SOC_INTEL_BRASWELL config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES select BOOT_DEVICE_SUPPORTS_WRITES diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 5fc80af33d..8f2f9d211d 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -47,7 +47,6 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NHLT - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 4169ec4c5d..bfd8c3f736 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -13,7 +13,6 @@ config CPU_INTEL_NUM_FIT_ENTRIES config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select DEBUG_GPIO diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig index f440d3313d..a6498b0894 100644 --- a/src/soc/intel/elkhartlake/Kconfig +++ b/src/soc/intel/elkhartlake/Kconfig @@ -8,7 +8,6 @@ if SOC_INTEL_ELKHARTLAKE config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index e5ab889dc3..13964604f3 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -8,7 +8,6 @@ if SOC_INTEL_ICELAKE config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index a05cd72a82..4d01d31dbc 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -8,7 +8,6 @@ if SOC_INTEL_JASPERLAKE config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index ffb08c6c99..497322f496 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -9,7 +9,6 @@ if SOC_INTEL_QUARK config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select NO_MMCONF_SUPPORT select REG_SCRIPT diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index d16a7c9898..9136a5f8e8 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -23,7 +23,6 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NHLT - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index e41d7a7dfd..9dc38a55e3 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -8,7 +8,6 @@ if SOC_INTEL_TIGERLAKE config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 1a63e59df9..60786aa7ca 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -26,7 +26,6 @@ if XEON_SP_COMMON_BASE config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES select CPU_INTEL_COMMON |