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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-11 21:07:36 +0200
committerNico Huber <nico.h@gmx.de>2020-06-13 12:25:18 +0000
commited318f2001c0616651f5fff4be5dbe10f4d66702 (patch)
tree46d392f9268ae37b789cf32e8acdc9457957e226
parent03248033e7be6f81ad5b60ed21a60071aee32c67 (diff)
arch/x86: Add symbols for CAR MTRRs in linker script
This allows to remove references to CONFIG_DCACHE_RAM entries in most cache_as_ram.S files. While Kconfig variable names appear for every stage, linker symbol names will only appear in stages they are valid in. Also, linker scripts have LOG2CEIL which comes in handy to enforce MTRR alignments. Change-Id: I2fef3546d2bfea2d4d8f87aaf8376e5566fd6aaa Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30872 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/arch/x86/car.ld24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index ddd4e7a2bf..17b774845b 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -1,5 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+/* CACHE_ROM_SIZE defined here. */
+#include <cpu/x86/mtrr.h>
+
/* This file is included inside a SECTIONS block */
. = CONFIG_DCACHE_RAM_BASE;
.car.data . (NOLOAD) : {
@@ -73,6 +76,27 @@
_car_region_end = . + CONFIG_DCACHE_RAM_SIZE - (. - _car_region_start);
}
+. = _car_region_end;
+.car.mrc_var . (NOLOAD) : {
+ . += CONFIG_DCACHE_RAM_MRC_VAR_SIZE;
+}
+
+#if ENV_BOOTBLOCK
+_car_mtrr_end = .;
+_car_mtrr_start = _car_region_start;
+
+_car_mtrr_size = _car_mtrr_end - _car_mtrr_start;
+_car_mtrr_sz_log2 = 1 << LOG2CEIL(_car_mtrr_size);
+_car_mtrr_mask = ~(MAX(4096, _car_mtrr_sz_log2) - 1);
+
+#if !CONFIG(NO_XIP_EARLY_STAGES)
+_xip_program_sz_log2 = 1 << LOG2CEIL(_ebootblock - _bootblock);
+_xip_mtrr_mask = ~(MAX(4096, _xip_program_sz_log2) - 1);
+#endif
+
+_rom_mtrr_mask = ~(CACHE_ROM_SIZE - 1);
+_rom_mtrr_base = _rom_mtrr_mask;
+#endif
/* Global variables are not allowed in romstage
* This section is checked during stage creation to ensure