diff options
| author | Jon Murphy <jpmurphy@google.com> | 2022-02-17 22:14:38 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-28 13:31:40 +0000 |
| commit | e6e46c968a81f9133b3462df630d377faf63031d (patch) | |
| tree | c2c40813783973214921fdbfc6951d211b4a3856 | |
| parent | 0bc013b15a28eb85316f408fdf33f1ba61061584 (diff) | |
mb/google/skyrim: Enable PCIe devices in devicetree
BUG=b:214414301
TEST=builds
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I6b12950843f3ee3b5abe4ef9c6bd5aba528cc4ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
| -rw-r--r-- | src/mainboard/google/skyrim/variants/baseboard/devicetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb index 921ace9925..c80286873a 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -47,6 +47,11 @@ chip soc/amd/sabrina device pnp 0c09.0 alias chrome_ec on end end end + device ref gpp_bridge_0 on end # WLAN + device ref gpp_bridge_1 on end # SD + device ref gpp_bridge_2 on end # WWAN + device ref gpp_bridge_3 on end # NVMe + device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref gfx on end # Internal GPU (GFX) device ref xhci_0 on # USB 3.1 (USB0) |