summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorFrank Chu <Frank_Chu@pegatron.corp-partner.google.com>2023-03-07 19:57:38 +0800
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2023-03-09 11:14:12 +0000
commitb06414685c874ca7628cf3f370d25730c37b4e00 (patch)
tree4a0cdd4d08b6150fa4eca513debda6fed1cd9f59
parent623cbe552b42c8ab458f74f55dd9f4b773555f05 (diff)
mb/google/brya/var/marasov: Half touch power-on delay to 150 ms
Decrease Touch i2c delay during power-on sequence from 300 ms to 150 ms to make S0ix resume time meet requirement. BUG=b:264199989 TEST=Run the following test from chroot. test_that -b {BOARD_NAME} {device IP} f:.*power_UiResume/control Check seconds_system_resume value less than 500 msec Signed-off-by: Frank Chu <Frank_Chu@pegatron.corp-partner.google.com> Change-Id: Ib81a9c1a90589b8b08e6ce6471db2abef96047ab Reviewed-on: https://review.coreboot.org/c/coreboot/+/73532 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Frank Chu <frank_chu@pegatron.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/brya/variants/marasov/overridetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb
index 4cc87907d6..a138c27c9b 100644
--- a/src/mainboard/google/brya/variants/marasov/overridetree.cb
+++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb
@@ -253,7 +253,7 @@ chip soc/intel/alderlake
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
register "probed" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
- register "reset_delay_ms" = "300"
+ register "reset_delay_ms" = "150"
register "reset_off_delay_ms" = "1"
register "enable_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"