diff options
author | Felix Singer <felixsinger@posteo.net> | 2023-10-26 16:14:34 +0200 |
---|---|---|
committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-10-30 14:00:59 +0000 |
commit | 983b169a366a3db03c9fab989e36973b5a6eee96 (patch) | |
tree | ca402e7b71be912882efe8466216085157341bbe | |
parent | ee1fd54aef8ec0aba9e3dc01111251e1ae6b9d12 (diff) |
mb/system76/rpl/dt: Use comma separated list for arrays
In order to improve the readability of the settings, use a comma
separated list to assign values to their indexes instead of repeating
the option name for each index.
Don't convert the settings for PCIe root ports as they should stay in
the device scope of them.
While on it, remove superfluous comments related to modified lines.
Change-Id: I15f326774850b3c9562f7eebb78f29430dec1031
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78667
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
8 files changed, 116 insertions, 98 deletions
diff --git a/src/mainboard/system76/rpl/variants/addw3/overridetree.cb b/src/mainboard/system76/rpl/variants/addw3/overridetree.cb index cddc3dd67c..292673a2ca 100644 --- a/src/mainboard/system76/rpl/variants/addw3/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/addw3/overridetree.cb @@ -8,18 +8,21 @@ chip soc/intel/alderlake #TODO: DDIB and DDID are both connected to TBT device ref xhci on - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 3.2 Gen 1 (Left) - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 2.0 (Left) - # Port reset messaging cannot be used, so do not use USB2_PORT_TYPE_C for these - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-C 3.2 Gen 2 (Rear) - register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Thunderbolt (Right) - register "usb2_ports[10]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[11]" = "USB2_PORT_MID(OC_SKIP)" # Secure Pad - register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A 3.2 Gen 1 (Left) - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C 3.2 Gen 2 (Rear) + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC_SKIP), /* Type-A 3.2 Gen 1 (Left) */ + [1] = USB2_PORT_MID(OC_SKIP), /* Type-A 2.0 (Left) */ + /* Port reset messaging cannot be used, + * so do not use USB2_PORT_TYPE_C for these */ + [2] = USB2_PORT_MID(OC_SKIP), /* Type-C 3.2 Gen 2 (Rear) */ + [8] = USB2_PORT_MID(OC_SKIP), /* Type-C Thunderbolt (Right) */ + [10] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [11] = USB2_PORT_MID(OC_SKIP), /* Secure Pad */ + [13] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A 3.2 Gen 1 (Left) */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-C 3.2 Gen 2 (Rear) */ + }" end device ref i2c0 on diff --git a/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb b/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb index b984fcd089..189d30633d 100644 --- a/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/bonw15/overridetree.cb @@ -6,18 +6,21 @@ chip soc/intel/alderlake subsystemid 0x1558 0x3702 inherit device ref xhci on - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Front) - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Rear) - register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Per-key RGB - # Port reset messaging cannot be used, so do not use USB2_PORT_TYPE_C for these - register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Thunderbolt (Right, Front) - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Thunderbolt with PD (Right, Rear) - register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Front) - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A 3.2 Gen 2 (Left, Rear) + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Front) */ + [1] = USB2_PORT_MID(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Rear) */ + [5] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [6] = USB2_PORT_MID(OC_SKIP), /* Per-key RGB */ + /* Port reset messaging cannot be used, + * so do not use USB2_PORT_TYPE_C for these */ + [8] = USB2_PORT_MID(OC_SKIP), /* Type-C Thunderbolt (Right, Front) */ + [9] = USB2_PORT_MID(OC_SKIP), /* Type-C Thunderbolt with PD (Right, Rear) */ + [13] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Front) */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A 3.2 Gen 2 (Left, Rear) */ + }" end device ref i2c0 on diff --git a/src/mainboard/system76/rpl/variants/darp9/overridetree.cb b/src/mainboard/system76/rpl/variants/darp9/overridetree.cb index 0e4c1a9049..c3bc2bddab 100644 --- a/src/mainboard/system76/rpl/variants/darp9/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/darp9/overridetree.cb @@ -29,18 +29,20 @@ chip soc/intel/alderlake end device ref tcss_dma0 on end device ref xhci on - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A - register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 (USB-C) - register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint - register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2 (Thunderbolt) - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH0 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 CH1 + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC_SKIP), /* Type-A */ + [1] = USB2_PORT_MID(OC_SKIP), /* Type-A */ + [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 (USB-C) */ + [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */ + [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 (Thunderbolt) */ + [6] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A */ + [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH0 */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH1 */ + }" end device ref i2c0 on # Touchpad I2C bus diff --git a/src/mainboard/system76/rpl/variants/galp7/overridetree.cb b/src/mainboard/system76/rpl/variants/galp7/overridetree.cb index c868054a62..0c0aec3071 100644 --- a/src/mainboard/system76/rpl/variants/galp7/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/galp7/overridetree.cb @@ -21,18 +21,20 @@ chip soc/intel/alderlake end device ref tcss_dma0 on end device ref xhci on - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_2 (USB 3.2 Gen1) - register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 (USB 3.2 Gen2) - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_1 (USB 3.2 Gen1) - register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint - register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2 (Thunerbolt) - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_2 (USB 3.2 Gen1) - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB3_1 (USB 3.2 Gen1) - register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 (USB 3.2 Gen2) + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC_SKIP), /* J_USB3_2 (USB 3.2 Gen1) */ + [1] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 (USB 3.2 Gen2) */ + [2] = USB2_PORT_MID(OC_SKIP), /* J_USB3_1 (USB 3.2 Gen1) */ + [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */ + [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 (Thunerbolt) */ + [6] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB3_2 (USB 3.2 Gen1) */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB3_1 (USB 3.2 Gen1) */ + [3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 (USB 3.2 Gen2) */ + }" end device ref i2c0 on # Touchpad I2C bus diff --git a/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb b/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb index 029760f756..dc0e8d8ec2 100644 --- a/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/gaze18/overridetree.cb @@ -3,19 +3,21 @@ chip soc/intel/alderlake subsystemid 0x1558 0x5630 inherit device ref xhci on - # USB2 - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_TYPEC1 (USB 3.1 Gen2) - register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Type-A (USB 3.1 Gen2) - register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # J_TYPEC2 (USB 3.1 Gen2) - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Finger - register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A (USB 3.1 Gen2) - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC2 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 - register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC1 + register "usb2_ports" = "{ + [2] = USB2_PORT_MID(OC_SKIP), /* J_TYPEC1 (USB 3.1 Gen2) */ + [4] = USB2_PORT_MID(OC_SKIP), /* Type-A (USB 3.1 Gen2) */ + [5] = USB2_PORT_MID(OC_SKIP), /* J_TYPEC2 (USB 3.1 Gen2) */ + [6] = USB2_PORT_MID(OC_SKIP), /* Finger */ + [7] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [8] = USB2_PORT_MID(OC_SKIP), /* Type-A */ + [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A (USB 3.1 Gen2) */ + [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC2 */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 */ + [3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 */ + }" end device ref i2c0 on diff --git a/src/mainboard/system76/rpl/variants/lemp12/overridetree.cb b/src/mainboard/system76/rpl/variants/lemp12/overridetree.cb index 6f6ede508a..593ac7c014 100644 --- a/src/mainboard/system76/rpl/variants/lemp12/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/lemp12/overridetree.cb @@ -13,17 +13,19 @@ chip soc/intel/alderlake end device ref tcss_dma0 on end device ref xhci on - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Left - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Right - register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1 - register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # 3G/LTE - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Left - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Right - register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # 3G/LTE + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC_SKIP), /* Type-A Left */ + [1] = USB2_PORT_MID(OC_SKIP), /* Type-A Right */ + [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */ + [3] = USB2_PORT_MID(OC_SKIP), /* 3G/LTE */ + [6] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Left */ + [1] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Right */ + [3] = USB3_PORT_DEFAULT(OC_SKIP), /* 3G/LTE */ + }" end device ref i2c0 on diff --git a/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb b/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb index 8c5315ba67..d337a572a5 100644 --- a/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/oryp11/overridetree.cb @@ -8,19 +8,21 @@ chip soc/intel/alderlake end device ref tcss_dma0 on end device ref xhci on - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB1: USB-A 3.2 Gen 1 (Left) - register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC1: USB-C Thunderbolt (Right) - register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # J_TYPEC2: USB-C 3.2 Gen 2 (Back) - register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Per-key RGB - register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # J_USB1: USB-A 3.2 Gen 1 (Right) - register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB1: USB-A 3.2 Gen 1 (Left) - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB1: USB-A 3.2 Gen 1 (Right) - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC2: USB-C 3.2 Gen 2 (Back) - register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_TYPEC2: USB-C 3.2 Gen 2 (Back) + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC_SKIP), /* AJ_USB1: USB-A 3.2 Gen 1 (Left) */ + [1] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1: USB-C Thunderbolt (Right) */ + [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */ + [4] = USB2_PORT_MID(OC_SKIP), /* Per-key RGB */ + [5] = USB2_PORT_MID(OC_SKIP), /* J_USB1: USB-A 3.2 Gen 1 (Right) */ + [7] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* AJ_USB1: USB-A 3.2 Gen 1 (Left) */ + [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB1: USB-A 3.2 Gen 1 (Right) */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */ + [3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */ + }" end device ref i2c0 on diff --git a/src/mainboard/system76/rpl/variants/serw13/overridetree.cb b/src/mainboard/system76/rpl/variants/serw13/overridetree.cb index 0faf98ced1..7ae1550275 100644 --- a/src/mainboard/system76/rpl/variants/serw13/overridetree.cb +++ b/src/mainboard/system76/rpl/variants/serw13/overridetree.cb @@ -6,19 +6,21 @@ chip soc/intel/alderlake subsystemid 0x1558 0xd502 inherit device ref xhci on - # USB2 - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB1 (USB 3.2 Gen2) - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB2 (USB 3.2 Gen2 + charger) - register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Per-KB - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint - register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera - register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # TBT USB2.0 - register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - # USB3 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB1 (USB 3.2 Gen2) - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB2 (USB 3.2 Gen2 + charger) + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC_SKIP), /* TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) */ + [1] = USB2_PORT_MID(OC_SKIP), /* AJ_USB1 (USB 3.2 Gen2) */ + [2] = USB2_PORT_MID(OC_SKIP), /* AJ_USB2 (USB 3.2 Gen2 + charger) */ + [5] = USB2_PORT_MID(OC_SKIP), /* Per-KB */ + [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */ + [7] = USB2_PORT_MID(OC_SKIP), /* Camera */ + [8] = USB2_PORT_MID(OC_SKIP), /* TBT USB2.0 */ + [13] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ + }" + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3) */ + [1] = USB3_PORT_DEFAULT(OC_SKIP), /* AJ_USB1 (USB 3.2 Gen2) */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* AJ_USB2 (USB 3.2 Gen2 + charger) */ + }" end device ref i2c0 on |