diff options
| author | Jarried Lin <jarried.lin@mediatek.corp-partner.google.com> | 2024-11-08 20:11:38 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2024-11-21 13:46:05 +0000 |
| commit | 8bada5dcb026b0ac27624b9547020b145fee1831 (patch) | |
| tree | 1103b80d3af088e52e33678e4ed6815ab31be911 | |
| parent | e8c7be53946ce690e8cba430fd07b90fd212d48d (diff) | |
mb/google/rauru: Fully calibrate DRAM
Initialize and calibrate DRAM in romstage.
DRAM full calibration logs:
dram_init: dram init end (result: 0)
DRAM-K:
Fast calibration passed in 1119 msecs
TEST=Full calibration pass.
BUG=b:317009620
Change-Id: Ibb18675caa11a828d27860eeab48c49acf6b938d
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85120
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
| -rw-r--r-- | src/mainboard/google/rauru/romstage.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/rauru/romstage.c b/src/mainboard/google/rauru/romstage.c index 98e8cd9dba..ebeedb88c8 100644 --- a/src/mainboard/google/rauru/romstage.c +++ b/src/mainboard/google/rauru/romstage.c @@ -1,12 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/stages.h> +#include <soc/emi.h> #include <soc/irq2axi.h> #include <soc/pcie.h> void platform_romstage_main(void) { irq2axi_disable(); + mtk_dram_init(); if (CONFIG(PCI)) mtk_pcie_deassert_perst(); |