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authorFelix Held <felix-coreboot@felixheld.de>2023-12-04 18:46:38 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-06 15:09:01 +0000
commit88da16b92d30b2be251a032cde34b086b2f473df (patch)
treebe7ab9e2c359a7bee2544c3d05e437090bfc6079
parent1fe1904f385076f9390441e017efdbb7673f6da8 (diff)
soc/amd/genoa/Kconfig: add CONSOLE_UART_BASE_ADDRESS defaults
Add defaults for the CONSOLE_UART_BASE_ADDRESS Kconfig symbol so that the SeaBIOS payload will know where the MMIO address of the UART is to build successfully without any additional user input during the build. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia05c3531cdbf3fd3e2e5f81b9d652f9dfef2111a Reviewed-on: https://review.coreboot.org/c/coreboot/+/79395 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
-rw-r--r--src/soc/amd/genoa/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig
index a98e634a0d..2068c44fdc 100644
--- a/src/soc/amd/genoa/Kconfig
+++ b/src/soc/amd/genoa/Kconfig
@@ -163,6 +163,13 @@ config PSP_SOFTFUSE_BITS
See #57299 (NDA) for additional bit definitions.
endmenu
+config CONSOLE_UART_BASE_ADDRESS
+ depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART
+ hex
+ default 0xfedc9000 if UART_FOR_CONSOLE = 0
+ default 0xfedca000 if UART_FOR_CONSOLE = 1
+ default 0xfedce000 if UART_FOR_CONSOLE = 2
+
config SMM_TSEG_SIZE
hex
default 0x800000