diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 11:49:22 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-05 14:22:39 +0000 |
| commit | 803029685f96bccac13359fc616d1577508ba764 (patch) | |
| tree | 6c67ba19094d2a9fe57001f0a19cc4a887bc6905 | |
| parent | 98c92570d9bb363740ae1b2cbbefc3c0f2404cb4 (diff) | |
nb/intel/x4x: Remove apic 0 from devicetree
This is added at runtime.
Change-Id: I7716f8a972e2280179aa6aee00488b22413c0c73
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69298
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
18 files changed, 18 insertions, 108 deletions
diff --git a/src/mainboard/acer/g43t-am3/devicetree.cb b/src/mainboard/acer/g43t-am3/devicetree.cb index 1f2bc08fac..94067a6def 100644 --- a/src/mainboard/acer/g43t-am3/devicetree.cb +++ b/src/mainboard/acer/g43t-am3/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x8086 0x0028 inherit diff --git a/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb index 28b24d8742..3eeeafd4a6 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41c-gs-r2/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb index 7daa4a479e..3b1f7fa08c 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41c-gs/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb index a5d205cb63..c041c63568 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-gs/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb index 83fc04094a..a89388f306 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-s3/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb index 0dbe8d9685..353e80bbde 100644 --- a/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb +++ b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb index d7d465508c..4b1d290a9c 100644 --- a/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5q/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge diff --git a/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb index d6dbc2dd44..b1b0106699 100644 --- a/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5q_pro/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge diff --git a/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb index f099ab297d..602ef02c5b 100644 --- a/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge diff --git a/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb index 54f9dcfd3e..6e7d1423e7 100644 --- a/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5qc/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge diff --git a/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb index f099ab297d..602ef02c5b 100644 --- a/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb +++ b/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge diff --git a/src/mainboard/asus/p5ql-em/devicetree.cb b/src/mainboard/asus/p5ql-em/devicetree.cb index 8e061f24a5..a8982f1afb 100644 --- a/src/mainboard/asus/p5ql-em/devicetree.cb +++ b/src/mainboard/asus/p5ql-em/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on # Host Bridge diff --git a/src/mainboard/asus/p5qpl-am/devicetree.cb b/src/mainboard/asus/p5qpl-am/devicetree.cb index 602ba576f4..b70a6afb7b 100644 --- a/src/mainboard/asus/p5qpl-am/devicetree.cb +++ b/src/mainboard/asus/p5qpl-am/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge diff --git a/src/mainboard/foxconn/g41s-k/devicetree.cb b/src/mainboard/foxconn/g41s-k/devicetree.cb index af15577158..b63d2045ec 100644 --- a/src/mainboard/foxconn/g41s-k/devicetree.cb +++ b/src/mainboard/foxconn/g41s-k/devicetree.cb @@ -1,12 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain device pci 0.0 on end # Host Bridge diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index 5ec31eb18a..4f6d9002e3 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/intel/dg41wv/devicetree.cb b/src/mainboard/intel/dg41wv/devicetree.cb index 06617f6aae..49d6f8bd2d 100644 --- a/src/mainboard/intel/dg41wv/devicetree.cb +++ b/src/mainboard/intel/dg41wv/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/intel/dg43gt/devicetree.cb b/src/mainboard/intel/dg43gt/devicetree.cb index 80d2bf7d63..c33509bb1a 100644 --- a/src/mainboard/intel/dg43gt/devicetree.cb +++ b/src/mainboard/intel/dg43gt/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x8086 0x0028 inherit diff --git a/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb b/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb index a8dea8db4b..4afbec9ea0 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb +++ b/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb @@ -1,12 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/x4x # Northbridge - device cpu_cluster 0 on - ops x4x_cpu_bus_ops # APIC cluster - chip cpu/intel/socket_LGA775 - device lapic 0 on end - end - end + device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster device domain 0 on ops x4x_pci_domain_ops # PCI domain subsystemid 0x17aa 0x304f inherit |