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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-10-23 18:48:34 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2024-11-16 20:19:21 +0000
commit69a65752a71c44e750638b49c8e067a74c84f8f9 (patch)
tree1d903c376e9d9b73c53b771974349396c2b2a800
parentb4a4a76a71fc72fe3d57f62e7e58ae04777184d5 (diff)
soc/intel/xeon_sp/skx: Lock PMC in post_mp_init
Since SKX and CPX are using the PCH, copy the code from CPX and lock the PMC in the same place. Reduced code differences between SKX and CPX and will allow to merge the codebase into one. Change-Id: I9495456fc2650b25ba164b336dc10ea0b88989aa Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84846 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/xeon_sp/skx/cpu.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c
index 009527c84e..113c6301c3 100644
--- a/src/soc/intel/xeon_sp/skx/cpu.c
+++ b/src/soc/intel/xeon_sp/skx/cpu.c
@@ -1,22 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <assert.h>
#include <console/console.h>
#include <console/debug.h>
-#include <intelblocks/cpulib.h>
#include <cpu/cpu.h>
#include <cpu/intel/cpu_ids.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/mp.h>
#include <cpu/intel/turbo.h>
+#include <cpu/intel/smm_reloc.h>
+#include <cpu/intel/em64t101_save_state.h>
+#include <intelblocks/cpulib.h>
+#include <intelpch/lockdown.h>
#include <soc/msr.h>
+#include <soc/pm.h>
#include <soc/soc_util.h>
#include <soc/smmrelocate.h>
#include <soc/util.h>
-#include <assert.h>
-#include "chip.h"
-#include <cpu/intel/smm_reloc.h>
-#include <cpu/intel/em64t101_save_state.h>
#include <types.h>
+#include "chip.h"
+
static const config_t *chip_config = NULL;
@@ -211,8 +214,11 @@ static void post_mp_init(void)
/* Set Max Ratio */
set_max_turbo_freq();
- if (CONFIG(HAVE_SMI_HANDLER))
+ if (CONFIG(HAVE_SMI_HANDLER)) {
global_smi_enable();
+ if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT)
+ pmc_lock_smi();
+ }
}
/*