summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSubrata Banik <subratabanik@google.com>2023-04-01 14:55:07 +0530
committerSubrata Banik <subratabanik@google.com>2023-04-02 10:07:21 +0000
commit450699d1c8e9b0305c1f0d9872f8f4a45983103e (patch)
tree4e794095703f3bc57c54ce6e0568ae98abe90456
parentd0d7f4710410bbf7d5ca7e89c740cf9f5d872a82 (diff)
soc/intel/meteorlake: Set Power Performance Platform Override
According to document 640858 MTL EDS Vol2, bit 18 (PWR_PERF_PLATFRM_OVR) of MSR_POWER_CTL must be set. This patch is backported from `commit 117770d32468e63df ("soc/intel/ alderlake: Enable Energy/Performance Bias control")`. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ic83225b619c49db0b49b521a83a2f1dc1ad69be8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74155 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/meteorlake/cpu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/meteorlake/cpu.c b/src/soc/intel/meteorlake/cpu.c
index 62639a1992..691f50d0d9 100644
--- a/src/soc/intel/meteorlake/cpu.c
+++ b/src/soc/intel/meteorlake/cpu.c
@@ -72,10 +72,11 @@ static void configure_misc(void)
msr.hi = 0;
wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr);
- /* Enable PROCHOT */
+ /* Enable PROCHOT and Power Performance Platform Override */
msr = rdmsr(MSR_POWER_CTL);
msr.lo |= (1 << 0); /* Enable Bi-directional PROCHOT as an input*/
msr.lo |= (1 << 23); /* Lock it */
+ msr.lo |= (1 << 18); /* Power Performance Platform Override */
wrmsr(MSR_POWER_CTL, msr);
}