diff options
| author | T Michael Turney <mturney@codeaurora.org> | 2018-10-26 07:02:29 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2018-12-12 02:20:54 +0000 |
| commit | 303a4bfd4a0df01c329683322466da46129313b1 (patch) | |
| tree | 856e3d8b5bdb7636dd912c6ecaec3c45cbb73007 | |
| parent | d2c02420e2e43a957e249804f7037b01e9a69b06 (diff) | |
cheza: TPM/EC enable Kconfig in mainboard
Change-Id: I15cfbbab15b940641c3952f2cfb4b11c37574816
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/29299
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
| -rw-r--r-- | src/mainboard/google/cheza/Kconfig | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/src/mainboard/google/cheza/Kconfig b/src/mainboard/google/cheza/Kconfig index 14ddc81e94..b940314acb 100644 --- a/src/mainboard/google/cheza/Kconfig +++ b/src/mainboard/google/cheza/Kconfig @@ -8,16 +8,21 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_16384 select COMMON_CBFS_SPI_WRAPPER + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_RTC + select EC_GOOGLE_CHROMEEC_SPI + select RTC select SOC_QUALCOMM_SDM845 select SPI_FLASH select SPI_FLASH_WINBOND select MAINBOARD_HAS_CHROMEOS select MISSING_BOARD_RESET + select MAINBOARD_HAS_TPM2 + select MAINBOARD_HAS_SPI_TPM_CR50 config VBOOT + select EC_GOOGLE_CHROMEEC_SWITCHES select VBOOT_VBNV_FLASH - select VBOOT_MOCK_SECDATA - select VBOOT_NO_BOARD_SUPPORT config MAINBOARD_DIR string @@ -27,6 +32,14 @@ config MAINBOARD_VENDOR string default "Google" +config DRIVER_TPM_SPI_BUS + hex + default 0x5 + +config EC_GOOGLE_CHROMEEC_SPI_BUS + hex + default 0xa + ########################################################## #### Update below when adding a new derivative board. #### ########################################################## |