diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-04-22 05:59:52 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-23 21:41:29 +0000 |
| commit | 27af3e6b111f462a71762bd56363d06d73505284 (patch) | |
| tree | 7becb08ed5b1670431d63f6a78edf24ad54df339 | |
| parent | 8c4a56a29543e495a9cd678200f01b901beeb934 (diff) | |
include/cpu/amd/mtrr: fix typo in get_top_of_mem_above_4gb
Add the missing 'b' to the 4gb so that get_top_of_mem_above_4gb is in
line with get_top_of_mem_below_4gb.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic9170372d8b0c27d7de3bd04d822c95e2015cb10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74710
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
| -rw-r--r-- | src/include/cpu/amd/mtrr.h | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpi/tables.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index e96dc90baa..04d775cade 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -70,7 +70,7 @@ static inline uint32_t get_top_of_mem_below_4gb(void) return rdmsr(TOP_MEM).lo; } -static inline uint64_t get_top_of_mem_above_4g(void) +static inline uint64_t get_top_of_mem_above_4gb(void) { msr_t msr = rdmsr(TOP_MEM2); return (uint64_t)msr.hi << 32 | msr.lo; diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index cba57d866a..b9ac022697 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -550,7 +550,7 @@ static void northbridge_fill_ssdt_generator(const struct device *device) * Shift value right by 20 bit to make it fit into 32bit, * giving us 1MB granularity and a limit of almost 4Exabyte of memory. */ - acpigen_write_name_dword("TOM2", get_top_of_mem_above_4g() >> 20); + acpigen_write_name_dword("TOM2", get_top_of_mem_above_4gb() >> 20); acpigen_pop_len(); } @@ -834,7 +834,7 @@ static void domain_read_resources(struct device *dev) sizek = 0; } else { - uint64_t topmem2 = get_top_of_mem_above_4g(); + uint64_t topmem2 = get_top_of_mem_above_4gb(); basek = 4 * 1024 * 1024; sizek = topmem2 / 1024 - basek; } diff --git a/src/soc/amd/common/block/acpi/tables.c b/src/soc/amd/common/block/acpi/tables.c index 17db421831..3ba9af6499 100644 --- a/src/soc/amd/common/block/acpi/tables.c +++ b/src/soc/amd/common/block/acpi/tables.c @@ -58,6 +58,6 @@ void acpi_fill_root_complex_tom(const struct device *device) * Shift value right by 20 bit to make it fit into 32bit, * giving us 1MB granularity and a limit of almost 4Exabyte of memory. */ - acpigen_write_name_dword("TOM2", get_top_of_mem_above_4g() >> 20); + acpigen_write_name_dword("TOM2", get_top_of_mem_above_4gb() >> 20); acpigen_pop_len(); } diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index bafeabbe24..75fdfa4a35 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -328,7 +328,7 @@ void domain_read_resources(struct device *dev) uint32_t uma_size = get_uma_size(); uint32_t mem_useable = (uintptr_t)cbmem_top(); uint32_t tom = get_top_of_mem_below_4gb(); - uint64_t high_tom = get_top_of_mem_above_4g(); + uint64_t high_tom = get_top_of_mem_above_4gb(); uint64_t high_mem_useable; int idx = 0x10; |