diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-10-24 16:57:26 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2017-11-03 07:11:37 +0000 |
| commit | d0e51330edba4981dce6f5e539049afe08d2e2de (patch) | |
| tree | d55408fa0ad472214f62aa60e8f67c3d5997f1e4 | |
| parent | 36e40e40a788d2d481d83cae63ade9b6984372c6 (diff) | |
soc/intel/apollolake: Set CPU to Max Non-Turbo Ratio
If the Running Average Power Limits (RAPL) feature is disabled, the CPU
should be set to the Max Non-Turbo Ratio. RAPL is switched off by
CONFIG_APL_SKIP_SET_POWER_LIMITS. Furthermore, a frequency change should
be prevented by disabling Enhanced Intel Speedstep Technology (EIST). So
the CPU should run with constant frequency with this setting.
Change-Id: I67020f7e75700255629294fd9bcf67ee01765a01
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/22148
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/soc/intel/apollolake/cpu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index db9dc1b17a..75f6c490e2 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2015-2017 Intel Corp. + * Copyright (C) 2017 Siemens AG, Inc. * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) * @@ -84,6 +85,12 @@ void soc_core_init(device_t cpu) /* Configure Core PRMRR for SGX. */ if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX)) prmrr_core_configure(); + + /* Set Max Non-Turbo ratio if RAPL is disabled. */ + if (IS_ENABLED(CONFIG_APL_SKIP_SET_POWER_LIMITS)) { + cpu_set_p_state_to_max_non_turbo_ratio(); + cpu_disable_eist(); + } } #if !IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT) |