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authorPeter Lemenkov <lemenkov@gmail.com>2019-12-03 22:15:49 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-30 08:48:13 +0000
commit98b78efabe028761f6c78048395b27f29ca4e290 (patch)
treeece6cd6c73df2c3efa1a09aeb97494278ec1e0c3
parent7e269ad06c5487c8a0731594167d6840482dfcb7 (diff)
mb/lenovo/t530: Switch to overridetree
Change-Id: I3dfa303b6aae2446fa3a1d67a6e31448277cacdb Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/mainboard/lenovo/t530/Kconfig4
-rw-r--r--src/mainboard/lenovo/t530/devicetree.cb (renamed from src/mainboard/lenovo/t530/variants/t530/devicetree.cb)6
-rw-r--r--src/mainboard/lenovo/t530/variants/t530/overridetree.cb13
-rw-r--r--src/mainboard/lenovo/t530/variants/w530/devicetree.cb185
-rw-r--r--src/mainboard/lenovo/t530/variants/w530/overridetree.cb24
5 files changed, 40 insertions, 192 deletions
diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig
index bef0dee118..0f8d3267f3 100644
--- a/src/mainboard/lenovo/t530/Kconfig
+++ b/src/mainboard/lenovo/t530/Kconfig
@@ -56,9 +56,9 @@ config MAINBOARD_DIR
string
default "lenovo/t530"
-config DEVICETREE
+config OVERRIDE_DEVICETREE
string
- default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+ default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
config MAINBOARD_PART_NUMBER
string
diff --git a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index cedb478573..1b16ca3b2c 100644
--- a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -40,7 +40,7 @@ chip northbridge/intel/sandybridge
device pci 01.0 on end # PCIe bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller
- chip southbridge/intel/bd82x6x # Intel Series 6 Panther Point PCH
+ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# GPI routing
# 0 No effect (default)
# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
@@ -140,10 +140,6 @@ chip northbridge/intel/sandybridge
register "has_bdc_detection" = "1"
register "bdc_gpio_num" = "54"
register "bdc_gpio_lvl" = "0"
-
- register "has_wwan_detection" = "1"
- register "wwan_gpio_num" = "70"
- register "wwan_gpio_lvl" = "0"
end
chip drivers/lenovo/hybrid_graphics
device pnp ff.f on end # dummy
diff --git a/src/mainboard/lenovo/t530/variants/t530/overridetree.cb b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb
new file mode 100644
index 0000000000..e48a702839
--- /dev/null
+++ b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb
@@ -0,0 +1,13 @@
+chip northbridge/intel/sandybridge
+ device domain 0 on
+ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
+ device pci 1f.0 on # PCI-LPC bridge
+ chip ec/lenovo/h8
+ register "has_wwan_detection" = "1"
+ register "wwan_gpio_num" = "70"
+ register "wwan_gpio_lvl" = "0"
+ end
+ end
+ end
+ end
+end
diff --git a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
deleted file mode 100644
index be6cc7d9d0..0000000000
--- a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
+++ /dev/null
@@ -1,185 +0,0 @@
-chip northbridge/intel/sandybridge
- # IGD Displays
- register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-
- # Enable DisplayPort Hotplug with 6ms pulse
- register "gpu_dp_d_hotplug" = "0x06"
-
- # Enable Panel as LVDS and configure power delays
- register "gpu_panel_port_select" = "0" # LVDS
- register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
- register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
- register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
- register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
- register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
- register "gpu_cpu_backlight" = "0x1155"
- register "gpu_pch_backlight" = "0x11551155"
-
- device cpu_cluster 0 on
- chip cpu/intel/model_206ax
- # Magic APIC ID to locate this chip
- device lapic 0x0 on end
- device lapic 0xacac off end
-
- register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
- register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
- register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
-
- register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
- register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
- register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
- end
- end
-
- register "pci_mmio_size" = "2048"
-
- device domain 0 on
- subsystemid 0x17aa 0x21f6 inherit
-
- device pci 00.0 on end # Host bridge
- device pci 01.0 on end # PCIe bridge for discrete graphics
- device pci 02.0 on # Internal graphics VGA controller
- subsystemid 0x17aa 0x21f5
- end
-
- chip southbridge/intel/bd82x6x # Intel Series 6 Panther Point PCH
- # GPI routing
- # 0 No effect (default)
- # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
- # 2 SCI (if corresponding GPIO_EN bit is also set)
- register "alt_gp_smi_en" = "0x0000"
- register "gpi1_routing" = "2"
- register "gpi13_routing" = "2"
-
- register "sata_port_map" = "0x3f"
- # Set max SATA speed to 6.0 Gb/s
- register "sata_interface_speed_support" = "0x3"
-
- register "gen1_dec" = "0x7c1601"
- register "gen2_dec" = "0x0c15e1"
- register "gen4_dec" = "0x0c06a1"
-
- # Enable zero-based linear PCIe root port functions
- register "pcie_port_coalesce" = "1"
- register "c2_latency" = "101" # c2 not supported
-
- register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
-
- register "xhci_switchable_ports" = "0xf"
- register "superspeed_capable_ports" = "0xf"
- register "xhci_overcurrent_mapping" = "0x04000201"
-
- register "docking_supported" = "1"
-
- register "spi_uvscc" = "0x2005"
- register "spi_lvscc" = "0x2005"
-
- device pci 14.0 on end # USB 3.0 Controller
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 on end # Management Engine KT
- device pci 19.0 on # Intel Gigabit Ethernet
- subsystemid 0x17aa 0x21f3
- end
- device pci 1a.0 on end # USB2 EHCI #2
- device pci 1b.0 on end # High Definition Audio
- device pci 1c.0 on # PCIe Port #1
- chip drivers/ricoh/rce822 # Ricoh cardreader
- register "disable_mask" = "0x83"
- register "sdwppol" = "1"
- device pci 00.0 on end # Ricoh SD card reader
- end
- end
- device pci 1c.1 on end # PCIe Port #2
- device pci 1c.2 on # PCIe Port #3
- smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
- end
- device pci 1c.3 off end # PCIe Port #4
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1d.0 on end # USB2 EHCI #1
- device pci 1e.0 off end # PCI bridge
- device pci 1f.0 on # PCI-LPC bridge
- chip ec/lenovo/pmh7
- device pnp ff.1 on end # dummy
- register "backlight_enable" = "0x01"
- register "dock_event_enable" = "0x01"
- end
-
- chip drivers/pc80/tpm
- device pnp 0c31.0 on end
- end
-
- chip ec/lenovo/h8
- device pnp ff.2 on # dummy
- io 0x60 = 0x62
- io 0x62 = 0x66
- io 0x64 = 0x1600
- io 0x66 = 0x1604
- end
-
- register "config0" = "0xa7"
- register "config1" = "0x01"
- register "config2" = "0xa0"
- register "config3" = "0xe2"
-
- register "has_keyboard_backlight" = "1"
-
- register "beepmask0" = "0x00"
- register "beepmask1" = "0x86"
- register "has_power_management_beeps" = "0"
- register "event2_enable" = "0xff"
- register "event3_enable" = "0xff"
- register "event4_enable" = "0xd0"
- register "event5_enable" = "0xfc"
- register "event6_enable" = "0x00"
- register "event7_enable" = "0x01"
- register "event8_enable" = "0x7b"
- register "event9_enable" = "0xff"
- register "eventa_enable" = "0x01"
- register "eventb_enable" = "0x00"
- register "eventc_enable" = "0xff"
- register "eventd_enable" = "0xff"
- register "evente_enable" = "0x0d"
-
- register "has_bdc_detection" = "1"
- register "bdc_gpio_num" = "54"
- register "bdc_gpio_lvl" = "0"
- end
- chip drivers/lenovo/hybrid_graphics
- device pnp ff.f on end # dummy
-
- register "detect_gpio" = "21"
-
- register "has_panel_hybrid_gpio" = "1"
- register "panel_hybrid_gpio" = "52"
- register "panel_integrated_lvl" = "1"
-
- register "has_backlight_gpio" = "0"
- register "has_dgpu_power_gpio" = "0"
-
- register "has_thinker1" = "1"
- end
- end
- device pci 1f.2 on end # SATA Controller 1
- device pci 1f.3 on # SMBus
- # eeprom, 8 virtual devices, same chip
- chip drivers/i2c/at24rf08c
- device i2c 54 on end
- device i2c 55 on end
- device i2c 56 on end
- device i2c 57 on end
- device i2c 5c on end
- device i2c 5d on end
- device i2c 5e on end
- device i2c 5f on end
- end
- end
- device pci 1f.5 off end # SATA Controller 2
- device pci 1f.6 off end # Thermal
- end
- end
-end
diff --git a/src/mainboard/lenovo/t530/variants/w530/overridetree.cb b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb
new file mode 100644
index 0000000000..fc5b31e04b
--- /dev/null
+++ b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb
@@ -0,0 +1,24 @@
+chip northbridge/intel/sandybridge
+ device domain 0 on
+ device pci 02.0 on # Internal graphics VGA controller
+ subsystemid 0x17aa 0x21f5
+ end
+ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
+ device pci 16.3 on end # Management Engine KT
+ device pci 1c.0 on # PCIe Port #1
+ chip drivers/ricoh/rce822 # Ricoh cardreader
+ register "disable_mask" = "0x83"
+ register "sdwppol" = "1"
+ device pci 00.0 on end # Ricoh SD card reader
+ end
+ end
+ device pci 1f.0 on # PCI-LPC bridge
+ chip ec/lenovo/h8
+ register "config1" = "0x01"
+ register "config3" = "0xe2"
+ end
+ end
+ device pci 1f.6 off end # Thermal
+ end
+ end
+end