diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-07-30 16:50:21 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-29 13:55:52 +0000 |
commit | 7dcb545ee2770f3a27d57c2d69cfa140af2d0348 (patch) | |
tree | a75436d6b3d4b36b8081b01a3bfd9d5a14cbf3c1 | |
parent | 321402bfced59bd241711ed8ee4a6d8e46f9f081 (diff) |
intel: auto include intel/common/firmware
Instead of selecting the Kconfig option and adding the subdir
entry within each chipset auto include the common/firmware
directory as it's guarded by HAVE_INTEL_FIRMWARE.
BUG=chrome-os-partner:43462
BRANCH=None
TEST=Built glados.
Change-Id: I166db67c41b16c4d9f0116abce00940514539fa5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11734
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/broadwell/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/Makefile.inc | 1 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/common/Makefile.inc | 3 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_rangeley/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/Makefile.inc | 2 |
10 files changed, 3 insertions, 14 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index e8c5022c2e..085a45e433 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../southbridge/intel/common/firmware ramstage-y += memmap.c romstage-y += memmap.c diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index eda9f76119..e5ac640610 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../southbridge/intel/common/firmware romstage-y += gpio_support.c romstage-y += iosf.c diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 183c40fac4..fdd064de2e 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../southbridge/intel/common/firmware ramstage-y += acpi.c ramstage-y += adsp.c diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index 45ea3e418d..39a253f692 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -30,7 +30,6 @@ subdirs-y += ../../../cpu/x86/cache subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../lib/fsp subdirs-y += fsp -subdirs-y += ../../../southbridge/intel/common/firmware ramstage-y += memmap.c romstage-y += memmap.c diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index 9214450702..a1256df2e3 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -19,8 +19,6 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_C216)$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X),y) -subdirs-y += ../common/firmware - ramstage-y += pch.c ramstage-y += azalia.c ramstage-y += lpc.c diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index 86823a10e4..36dc4327ec 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -17,6 +17,9 @@ ## Foundation, Inc. ## +# CONFIG_HAVE_INTEL_FIRMWARE protects doing anything to the build. +subdirs-y += firmware + ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y) romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc index 228b6eb5f2..d14d303c75 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc +++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc @@ -20,8 +20,6 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X),y) -subdirs-y += ../common/firmware - ramstage-y += pch.c ramstage-y += azalia.c ramstage-y += lpc.c diff --git a/src/southbridge/intel/fsp_rangeley/Makefile.inc b/src/southbridge/intel/fsp_rangeley/Makefile.inc index 1d35b54dc1..2a66b90ec8 100644 --- a/src/southbridge/intel/fsp_rangeley/Makefile.inc +++ b/src/southbridge/intel/fsp_rangeley/Makefile.inc @@ -20,8 +20,6 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_RANGELEY),y) -subdirs-y += ../common/firmware - ramstage-y += soc.c ramstage-y += lpc.c ramstage-y += sata.c diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc index 57c498d2f9..77f2797d42 100644 --- a/src/southbridge/intel/ibexpeak/Makefile.inc +++ b/src/southbridge/intel/ibexpeak/Makefile.inc @@ -19,8 +19,6 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK),y) -subdirs-y += ../common/firmware - ramstage-y += ../bd82x6x/pch.c ramstage-y += azalia.c ramstage-y += lpc.c diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index a42fe3946f..7cff6b8fb0 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -19,8 +19,6 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT),y) -subdirs-y += ../common/firmware - ramstage-y += pch.c ramstage-y += azalia.c ramstage-y += lpc.c |