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authorKevin Chang <kevin.chang@lcfc.corp-partner.google.com>2020-11-11 10:43:24 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-12-08 21:33:11 +0000
commite38482610c1b51dfb347959def00bb2bba91a4a5 (patch)
tree27c6a3eacbb3685e9c8632059561f0815c8f4015
parent30fd5bffa250054c2791a1dfb6150af54b5776fb (diff)
mb/google/volteer/variant/lindar: Add PMC.MUX.CONx device configuration and disabling DDI port 1 and 2 HPD.
This patch adds the PMC MUX and CONx devices for lindar. Device specific method contains the port and orientation details used to configure the mux. BUG=b:172533907 BRANCH=firmware-volteer-13521.B TEST=Built and booted into OS. Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: Id5ee78b7ece8421144086af9b95f5f0d849be56c Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao@google.com> Reviewed-by: Caveh Jalali <caveh@chromium.org>
-rw-r--r--src/mainboard/google/volteer/variants/lindar/gpio.c4
-rw-r--r--src/mainboard/google/volteer/variants/lindar/overridetree.cb31
2 files changed, 31 insertions, 4 deletions
diff --git a/src/mainboard/google/volteer/variants/lindar/gpio.c b/src/mainboard/google/volteer/variants/lindar/gpio.c
index 8b56e0d74c..7b5184db0e 100644
--- a/src/mainboard/google/volteer/variants/lindar/gpio.c
+++ b/src/mainboard/google/volteer/variants/lindar/gpio.c
@@ -16,10 +16,6 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_GPO(GPP_A13, 1, DEEP),
/* A16 : USB_OC3# ==> USB_C0_OC_ODL */
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
- /* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */
- PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
- /* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */
- PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
/* A22 : DDPC_CTRLDATA ==> EN_PP3300_SSD */
PAD_CFG_GPO(GPP_A22, 1, DEEP),
/* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */
diff --git a/src/mainboard/google/volteer/variants/lindar/overridetree.cb b/src/mainboard/google/volteer/variants/lindar/overridetree.cb
index 277ba60fa6..2e0c93b4c9 100644
--- a/src/mainboard/google/volteer/variants/lindar/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/lindar/overridetree.cb
@@ -1,4 +1,6 @@
chip soc/intel/tigerlake
+ register "DdiPort1Hpd" = "0"
+ register "DdiPort2Hpd" = "0"
# USB Port Config
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C C1
@@ -145,6 +147,35 @@ chip soc/intel/tigerlake
device i2c 0x2c on end
end
end
+ device ref pch_espi on
+ chip ec/google/chromeec
+ use conn0 as mux_conn[0]
+ use conn1 as mux_conn[1]
+ device pnp 0c09.0 on end
+ end
+ end
+ device ref pmc hidden
+ # The pmc_mux chip driver is a placeholder for the
+ # PMC.MUX device in the ACPI hierarchy.
+ chip drivers/intel/pmc_mux
+ device generic 0 on
+ chip drivers/intel/pmc_mux/conn
+ register "usb2_port_number" = "9"
+ register "usb3_port_number" = "1"
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+ device generic 0 alias conn0 on end
+ end
+ chip drivers/intel/pmc_mux/conn
+ register "usb2_port_number" = "4"
+ register "usb3_port_number" = "2"
+ # SBU is fixed, HSL follows CC
+ register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
+ device generic 1 alias conn1 on end
+ end
+ end
+ end
+ end
device ref north_xhci on
chip drivers/usb/acpi
device ref tcss_root_hub on