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authorDuncan Laurie <dlaurie@chromium.org>2013-12-12 10:42:31 -0800
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-12 22:08:15 +0200
commitd82caded48a7b2a3f0e8662e3e35a30aa7839743 (patch)
tree9b5e1372f2819cfb2b7369e59443e0e32900c738
parent2e4dea663ce9f23f8cd925803b045259219d927d (diff)
baytrail: Add header include wrapper and offset define
Since this file will get added to payloads it is useful if it exports what offset in NVS it lives. BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot rambi with emmc in ACPI mode Change-Id: I52860980c91dfe2525628e142b34ca192e69b258 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179848 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/5014 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
-rw-r--r--src/soc/intel/baytrail/baytrail/device_nvs.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/baytrail/device_nvs.h b/src/soc/intel/baytrail/baytrail/device_nvs.h
index dcb05d2945..f8f831b735 100644
--- a/src/soc/intel/baytrail/baytrail/device_nvs.h
+++ b/src/soc/intel/baytrail/baytrail/device_nvs.h
@@ -17,8 +17,14 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#ifndef _BAYTRAIL_DEVICE_NVS_H_
+#define _BAYTRAIL_DEVICE_NVS_H_
+
#include <stdint.h>
+/* Offset in Global NVS where this structure lives */
+#define DEVICE_NVS_OFFSET 0x1000
+
#define LPSS_NVS_SIO_DMA1 0
#define LPSS_NVS_I2C1 1
#define LPSS_NVS_I2C2 2
@@ -57,3 +63,5 @@ typedef struct {
/* Extra */
u32 lpe_fw; /* LPE Firmware */
} __attribute__((packed)) device_nvs_t;
+
+#endif