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authorNick Vaccaro <nvaccaro@google.com>2020-08-05 14:50:40 -0700
committerNick Vaccaro <nvaccaro@google.com>2020-08-06 17:42:31 +0000
commitce25b947e0dbecf38b51789b5a54e09fe5f77a78 (patch)
tree7758acec1ea3f9d29260d417030791f8a702306b
parent0cc63ccaa26c21d02025f3b1c31f2fc4e8adc697 (diff)
mb/google/volteer: add support for ddr4 memory
Add new ddr_memory_cfg structure to support both DDR4 and LPDDR4x memory types. Change existing variant code to use the new meminit_ddr() call instead of calling meminit_lpddr4x() directly. BUG=b:161772961 TEST='emerge-volteer coreboot chromeos-bootimage' and verify that volteer still boots. NOTE that this only tests the lpddr4 side of the implementation as I do not have a DDR4 board to test this on. Change-Id: Id4bca2bfa97530f0d04a0e8d90f01b8281d2aea6 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44250 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>
-rw-r--r--src/mainboard/google/volteer/romstage.c4
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h2
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/memory.c9
-rw-r--r--src/mainboard/google/volteer/variants/delbin/memory.c9
-rw-r--r--src/mainboard/google/volteer/variants/malefor/memory.c9
-rw-r--r--src/mainboard/google/volteer/variants/terrador/memory.c9
-rw-r--r--src/mainboard/google/volteer/variants/todor/memory.c9
-rw-r--r--src/mainboard/google/volteer/variants/voxel/memory.c9
8 files changed, 45 insertions, 15 deletions
diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c
index 10c424ee4e..8893785774 100644
--- a/src/mainboard/google/volteer/romstage.c
+++ b/src/mainboard/google/volteer/romstage.c
@@ -15,7 +15,7 @@
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
- const struct lpddr4x_cfg *board_cfg = variant_memory_params();
+ const struct ddr_memory_cfg *board_cfg = variant_memory_params();
const struct spd_info spd_info = {
.topology = MEMORY_DOWN,
.md_spd_loc = SPD_CBFS,
@@ -27,7 +27,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
if (fw_config_probe(FW_CONFIG(AUDIO, NONE)))
mem_cfg->PchHdaEnable = 0;
- meminit_lpddr4x(mem_cfg, board_cfg, &spd_info, half_populated);
+ meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated);
}
bool mainboard_get_dram_part_num(const char **part_num, size_t *len)
diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
index 2f90a42e71..84081983c3 100644
--- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
@@ -18,7 +18,7 @@ const struct pad_config *variant_override_gpio_table(size_t *num);
const struct cros_gpio *variant_cros_gpios(size_t *num);
-const struct lpddr4x_cfg *variant_memory_params(void);
+const struct ddr_memory_cfg *variant_memory_params(void);
int variant_memory_sku(void);
#endif /* __BASEBOARD_VARIANTS_H__ */
diff --git a/src/mainboard/google/volteer/variants/baseboard/memory.c b/src/mainboard/google/volteer/variants/baseboard/memory.c
index 2da395aa09..dafeb3b3a6 100644
--- a/src/mainboard/google/volteer/variants/baseboard/memory.c
+++ b/src/mainboard/google/volteer/variants/baseboard/memory.c
@@ -4,7 +4,7 @@
#include <baseboard/variants.h>
#include <gpio.h>
-static const struct lpddr4x_cfg baseboard_memcfg = {
+static const struct lpddr4x_cfg baseboard_lpddr4x_memcfg = {
/* DQ CPU<>DRAM map */
.dq_map = {
[0] = {
@@ -56,7 +56,12 @@ static const struct lpddr4x_cfg baseboard_memcfg = {
.ect = 1, /* Enable Early Command Training */
};
-const struct lpddr4x_cfg *__weak variant_memory_params(void)
+static const struct ddr_memory_cfg baseboard_memcfg = {
+ .mem_type = MEMTYPE_LPDDR4X,
+ .lpddr4_cfg = &baseboard_lpddr4x_memcfg
+};
+
+const struct ddr_memory_cfg *__weak variant_memory_params(void)
{
return &baseboard_memcfg;
}
diff --git a/src/mainboard/google/volteer/variants/delbin/memory.c b/src/mainboard/google/volteer/variants/delbin/memory.c
index 788ba51d01..9d8ad405ce 100644
--- a/src/mainboard/google/volteer/variants/delbin/memory.c
+++ b/src/mainboard/google/volteer/variants/delbin/memory.c
@@ -54,7 +54,12 @@ static const struct lpddr4x_cfg delbin_memcfg = {
.ect = 1, /* Enable Early Command Training */
};
-const struct lpddr4x_cfg *variant_memory_params(void)
+static const struct ddr_memory_cfg board_memcfg = {
+ .mem_type = MEMTYPE_LPDDR4X,
+ .lpddr4_cfg = &delbin_memcfg
+};
+
+const struct ddr_memory_cfg *variant_memory_params(void)
{
- return &delbin_memcfg;
+ return &board_memcfg;
}
diff --git a/src/mainboard/google/volteer/variants/malefor/memory.c b/src/mainboard/google/volteer/variants/malefor/memory.c
index 5444c6fdd3..2c879e09b4 100644
--- a/src/mainboard/google/volteer/variants/malefor/memory.c
+++ b/src/mainboard/google/volteer/variants/malefor/memory.c
@@ -54,7 +54,12 @@ static const struct lpddr4x_cfg malefor_memcfg = {
.ect = 1, /* Enable Early Command Training */
};
-const struct lpddr4x_cfg *variant_memory_params(void)
+static const struct ddr_memory_cfg board_memcfg = {
+ .mem_type = MEMTYPE_LPDDR4X,
+ .lpddr4_cfg = &malefor_memcfg
+};
+
+const struct ddr_memory_cfg *variant_memory_params(void)
{
- return &malefor_memcfg;
+ return &board_memcfg;
}
diff --git a/src/mainboard/google/volteer/variants/terrador/memory.c b/src/mainboard/google/volteer/variants/terrador/memory.c
index 773e88561d..7d95658891 100644
--- a/src/mainboard/google/volteer/variants/terrador/memory.c
+++ b/src/mainboard/google/volteer/variants/terrador/memory.c
@@ -54,7 +54,12 @@ static const struct lpddr4x_cfg terrador_memcfg = {
.ect = 1, /* Enable Early Command Training */
};
-const struct lpddr4x_cfg *variant_memory_params(void)
+static const struct ddr_memory_cfg board_memcfg = {
+ .mem_type = MEMTYPE_LPDDR4X,
+ .lpddr4_cfg = &terrador_memcfg
+};
+
+const struct ddr_memory_cfg *variant_memory_params(void)
{
- return &terrador_memcfg;
+ return &board_memcfg;
}
diff --git a/src/mainboard/google/volteer/variants/todor/memory.c b/src/mainboard/google/volteer/variants/todor/memory.c
index 5adf80cf81..c8b4ab4e3c 100644
--- a/src/mainboard/google/volteer/variants/todor/memory.c
+++ b/src/mainboard/google/volteer/variants/todor/memory.c
@@ -54,7 +54,12 @@ static const struct lpddr4x_cfg todor_memcfg = {
.ect = 1, /* Enable Early Command Training */
};
-const struct lpddr4x_cfg *variant_memory_params(void)
+static const struct ddr_memory_cfg board_memcfg = {
+ .mem_type = MEMTYPE_LPDDR4X,
+ .lpddr4_cfg = &todor_memcfg
+};
+
+const struct ddr_memory_cfg *variant_memory_params(void)
{
- return &todor_memcfg;
+ return &board_memcfg;
}
diff --git a/src/mainboard/google/volteer/variants/voxel/memory.c b/src/mainboard/google/volteer/variants/voxel/memory.c
index 455b18045d..40b108660d 100644
--- a/src/mainboard/google/volteer/variants/voxel/memory.c
+++ b/src/mainboard/google/volteer/variants/voxel/memory.c
@@ -54,7 +54,12 @@ static const struct lpddr4x_cfg voxel_memcfg = {
.ect = 1, /* Enable Early Command Training */
};
-const struct lpddr4x_cfg *variant_memory_params(void)
+static const struct ddr_memory_cfg board_memcfg = {
+ .mem_type = MEMTYPE_LPDDR4X,
+ .lpddr4_cfg = &voxel_memcfg
+};
+
+const struct ddr_memory_cfg *variant_memory_params(void)
{
- return &voxel_memcfg;
+ return &board_memcfg;
}