diff options
author | Matt DeVillier <matt.devillier@puri.sm> | 2020-09-23 17:11:19 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-28 09:33:46 +0000 |
commit | b5eae2868bf699043b41b31068841ed1015d424c (patch) | |
tree | 59b37b1faef7dd1fcd8a6677a17e72fba3370534 | |
parent | 0d5ac7440a1750169da3132d0e181a429d191002 (diff) |
mb/purism/librem_skl: Enable and set SATA tuning params
Some Librems have issues with 6Gbps SATA operation on certain
SSDs, setting the Receiver Equalization Boost Magnitude adjustment
resolves this.
Test: build/boot Librem 15v3 with Crucial SATA SSD, observe no issues
booting, no ATA-related errors in dmesg on PureOS 10 / kernel 5.8.7
Change-Id: I078deeff7fc54694393b5b16c41c5d622b332781
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45695
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r-- | src/mainboard/purism/librem_skl/romstage.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/purism/librem_skl/romstage.c b/src/mainboard/purism/librem_skl/romstage.c index de493b0da9..7be8325176 100644 --- a/src/mainboard/purism/librem_skl/romstage.c +++ b/src/mainboard/purism/librem_skl/romstage.c @@ -64,4 +64,10 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mem_cfg->DqPinsInterleaved = TRUE; mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t) blk.spd_array[0]; + + /* Enable and set SATA HSIO adjustments for ports 0 and 2 */ + mem_cfg->PchSataHsioRxGen3EqBoostMagEnable[0] = 1; + mem_cfg->PchSataHsioRxGen3EqBoostMagEnable[2] = 1; + mem_cfg->PchSataHsioRxGen3EqBoostMag[0] = 1; + mem_cfg->PchSataHsioRxGen3EqBoostMag[2] = 1; } |