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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2020-01-08 17:04:16 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-01-18 10:59:17 +0000
commit92bd83979f8a7b855a78e9bea2d274d1a4f308b6 (patch)
tree9fe29426ef269071faa5c365801fd47ce9ff4111
parentee6557c06ed740f7a9399e2f26c1ac8507199ce8 (diff)
mb/intel/jasperlake_rvp: Remove sd card detect gpio
Tigerlake SoC doesn't have GPIO defined for GPP_G. so compilation is failing due to this. We will update correct gpio for sd card detect once we have Jasper Lake soc gpio patch. partner bug for tracking: https://ticket.coreboot.org/issues/251 BUG=None BRANCH=NONE TEST='jslrvp' mainboard builds successfully Change-Id: I097b2f3a4fef1a487495a4aa9d2bcf88aa64f017 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38259 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 76ceb3046d..b4ed69744b 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -158,9 +158,6 @@ chip soc/intel/tigerlake
# Enable DPTF
register "dptf_enable" = "1"
- # GPIO for SD card detect
- register "sdcard_cd_gpio" = "GPP_G5"
-
# Enable S0ix
register "s0ix_enable" = "0"