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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-11-24 14:11:56 -0600
committerMartin Roth <martinroth@google.com>2016-01-29 17:04:32 +0100
commit40e1fac56a8e2b91418929afbbfea533662443c7 (patch)
tree6e3b3557c682be0a05a59d96b3f64f2048cc11b8
parente10d07e336569ff5abbc3fbbffeeccbb165de681 (diff)
southbridge/amd/sb700: Add CMOS option to disable legacy USB support
Change-Id: I136c259136ce66a0c319a965ae0ee27f66dce1b3 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13155 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/southbridge/amd/sb700/sm.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c
index 7c9c004cd3..5f6d20e688 100644
--- a/src/southbridge/amd/sb700/sm.c
+++ b/src/southbridge/amd/sb700/sm.c
@@ -66,6 +66,7 @@ static void sm_init(device_t dev)
u32 dword;
void *ioapic_base;
uint32_t power_state;
+ uint32_t enable_legacy_usb;
u32 nmi_option;
printk(BIOS_INFO, "sm_init().\n");
@@ -75,10 +76,23 @@ static void sm_init(device_t dev)
ioapic_base = (void *)(pci_read_config32(dev, 0x74) & (0xffffffe0));
setup_ioapic(ioapic_base, 0); /* Don't rename IOAPIC ID. */
+ enable_legacy_usb = 1;
+ get_option(&enable_legacy_usb, "enable_legacy_usb");
+
/* 2.10 Interrupt Routing/Filtering */
- dword = pci_read_config8(dev, 0x62);
- dword |= 3;
- pci_write_config8(dev, 0x62, dword);
+ byte = pci_read_config8(dev, 0x62);
+ if (enable_legacy_usb)
+ byte |= 0x3;
+ else
+ byte &= ~0x3;
+ pci_write_config8(dev, 0x62, byte);
+
+ byte = pci_read_config8(dev, 0x67);
+ if (enable_legacy_usb)
+ byte |= 0x1 << 7;
+ else
+ byte &= ~(0x1 << 7);
+ pci_write_config8(dev, 0x67, byte);
/* Delay back to back interrupts to the CPU. */
dword = pci_read_config16(dev, 0x64);