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authorFelix Singer <felixsinger@posteo.net>2021-12-30 02:47:08 +0100
committerFelix Singer <felixsinger@posteo.net>2021-12-31 09:01:42 +0000
commitf3c313b47cdb93e17f538cf6b8fc3f46e6888dae (patch)
tree7db36c9054605b90dce81719fddb959bd7c48cd1
parentd190cdd25ea1365ae6ce31a9669253d2d175ed6b (diff)
soc/intel/apollolake/acpi: Replace Add(a,b) with ASL 2.0 syntax
Replace `Add (a, b)` with `a + b`. Change-Id: Id465558f054494d3273d5cd6077476d878d7c183 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60504 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/apollolake/acpi/gpiolib.asl8
-rw-r--r--src/soc/intel/apollolake/acpi/northbridge.asl2
2 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/acpi/gpiolib.asl b/src/soc/intel/apollolake/acpi/gpiolib.asl
index e01d54959e..eb46df53f0 100644
--- a/src/soc/intel/apollolake/acpi/gpiolib.asl
+++ b/src/soc/intel/apollolake/acpi/gpiolib.asl
@@ -31,7 +31,7 @@ Scope (\_SB)
Method (GPC1, 0x1, Serialized)
{
/* Arg0 - GPIO DW0 address */
- Store (Add (Arg0, 0x4), Local0)
+ Store (Arg0 + 4, Local0)
OperationRegion (PDW1, SystemMemory, Local0, 4)
Field (PDW1, AnyAcc, NoLock, Preserve) {
TEMP, 32
@@ -44,7 +44,7 @@ Scope (\_SB)
{
/* Arg0 - GPIO DW0 address */
/* Arg1 - Value for DW1 register */
- Store (Add (Arg0, 0x4), Local0)
+ Store (Arg0 + 4, Local0)
OperationRegion (PDW1, SystemMemory, Local0, 4)
Field(PDW1, AnyAcc, NoLock, Preserve) {
TEMP,32
@@ -60,8 +60,8 @@ Scope (\_SB)
Store (0, Local1)
Or( Or (ShiftLeft (Arg0, 16), CONFIG_PCR_BASE_ADDRESS),
Local1, Local1)
- Or( Add (PAD_CFG_BASE, Multiply (Arg1, Multiply (
- GPIO_NUM_PAD_CFG_REGS, 4))), Local1, Local1)
+ Or(PAD_CFG_BASE + Multiply (Arg1, Multiply (
+ GPIO_NUM_PAD_CFG_REGS, 4)), Local1, Local1)
Return (Local1)
}
diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl
index 4f2acbb8bd..ea9d5b4cc3 100644
--- a/src/soc/intel/apollolake/acpi/northbridge.asl
+++ b/src/soc/intel/apollolake/acpi/northbridge.asl
@@ -109,7 +109,7 @@ Method (_CRS, 0, Serialized)
/* Set 64bit MMIO resource base and length */
Store (A4GS, MLEN)
Store (A4GB, MMIN)
- MMAX = Add (MMIN, MLEN) - 1
+ MMAX = MMIN + MLEN - 1
}
Return (MCRS)