diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-23 10:12:56 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-25 11:07:07 +0000 |
| commit | c194f75bb56e4affab7e056c61b5ee33839fe685 (patch) | |
| tree | fbaa47bbf92611e9566b7b8342f8eadd4ef8eb52 | |
| parent | 0e9a616c2935bf5a8559a8ddf2356e940b62a8e9 (diff) | |
soc/amd/common/block/include/gpio_defs: drop 8k pullup define
The corresponding bit is marked as reserved in the following versions of
the documentation for all SoCs using this code:
Mullins: BKDG #52740 Rev 3.05
Stoneyridge: BKDG #55072 Rev 3.04
Raven1, Picasso: PPR #55570 Rev 3.16 & 3.18
Raven2: PPR #55772 Rev 3.08
Cezanne: PPR #56569 Rev 3.03
The old Rev 3.14 of the Picasso PPR #55570 had the bit 19 defined as
PullUpSel, but this is no longer the case in newer versions. It is
unclear if this got de-featured or if it was never present in the
silicon. To be consistent with the current documentation, drop this
define.
This patch also change the definition of GPIO_PULL_MASK to only cover
the bits used for the feature. The Cezanne PPR #56569 Rev 3.03 states a
default value of 0 for this bit after reset, so the resulting values in
the register aren't expected change. The other PPRs/BKDGs don't specify
a reset value for this bit, but it's likely safe to assume that all SoCs
that use the new GPIO interface use the same GPIO building block.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iaf2d4eec7a13e558c75d7edea343b876909a5b33
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/gpio_defs.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h index 757e0f2587..793e71787f 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h @@ -52,10 +52,10 @@ #define GPIO_S4_S5_WAKE_EN (1 << 15) #define GPIO_PIN_STS (1 << 16) -#define GPIO_8KPULLUP_SELECT (1 << 19) + #define GPIO_PULLUP_ENABLE (1 << 20) #define GPIO_PULLDOWN_ENABLE (1 << 21) -#define GPIO_PULL_MASK (7 << 19) +#define GPIO_PULL_MASK (3 << 20) #define GPIO_INPUT_SHIFT 16 #define GPIO_INPUT_VALUE (1 << GPIO_INPUT_SHIFT) @@ -72,7 +72,6 @@ #define GPIO_OUTPUT_OUT_HIGH (GPIO_OUTPUT_ENABLE | GPIO_OUTPUT_VALUE) #define GPIO_OUTPUT_OUT_LOW GPIO_OUTPUT_ENABLE -#define GPIO_PULL_PULL_UP_8K (GPIO_PULLUP_ENABLE | GPIO_8KPULLUP_SELECT) #define GPIO_PULL_PULL_UP GPIO_PULLUP_ENABLE #define GPIO_PULL_PULL_DOWN GPIO_PULLDOWN_ENABLE #define GPIO_PULL_PULL_NONE 0 |