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authorFurquan Shaikh <furquan@google.com>2021-08-25 15:49:22 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-08-27 15:58:42 +0000
commitba936ce5db819d5ecb34e83a998b2390ecbdc4b9 (patch)
tree2a9f5c3e962bdc0cc45377db3a6904462558c0a5
parentc398a204b40f6a9ccb06cb9b6af67ad528638a05 (diff)
soc/intel/denverton_ns: Ensure CPU device has a valid link
This change calls `add_more_links()` in `denverton_init_cpus()` if `dev->link_list` is NULL. This condition can occur if mainboard does not add any APIC device in the device tree. Link: https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/YLMK2FBWWL6RKDNKBVZB3NJDYMEYHED7/ "A different lapic number in devicetree.cb needed for CPU with the same SKU and steping (Intel Atom C3538)." Change-Id: I6f453901b17f7eff22beed8dbf6995cdc9f9b776 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57152 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: King Sumo <kingsumos@gmail.com> Reviewed-by: Suresh Bellampalli <suresh.bellampalli@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Mariusz SzafraƄski <mariuszx.szafranski@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/denverton_ns/cpu.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index 1dc0830d86..10e79be3b5 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -287,6 +287,14 @@ static const struct mp_ops mp_ops = {
void denverton_init_cpus(struct device *dev)
{
+ /*
+ * Ensure there is at least one bus downstream to the CPU device. If not, then create a
+ * new link. This can occur if the mainboard does not add any APIC device in the device
+ * tree.
+ */
+ if (!dev->link_list)
+ add_more_links(dev, 1);
+
/* Clear for take-off */
if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
printk(BIOS_ERR, "MP initialization failure.\n");