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authorFelix Singer <felixsinger@posteo.net>2020-11-30 08:48:24 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-05-28 18:30:10 +0000
commit83e0b97dc567c145bff21cd8a816b92924d09092 (patch)
treebed73b4b838e4e1daf5acdad1b56ef53a82a3629
parenteab9290b5f77880bfefd0215ffb7e9844c76b5a2 (diff)
mb/kontron/mal10: Use mainboard_ops driver for GPIO configuration
`mainboard_silicon_init_params()` should *only* be used for configuring FSP options which can not be configured anywhere else. Therefore, use the init phase from the mainboard_ops driver for configuring the GPIOs. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: Ia01091938ac113cb5cf95f046609a1ebf3620806 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48143 Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/kontron/mal10/ramstage.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/mainboard/kontron/mal10/ramstage.c b/src/mainboard/kontron/mal10/ramstage.c
index 3d259d8ea7..f03006ad85 100644
--- a/src/mainboard/kontron/mal10/ramstage.c
+++ b/src/mainboard/kontron/mal10/ramstage.c
@@ -1,12 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <device/device.h>
#include <soc/ramstage.h>
#include <carrier/gpio.h>
-void mainboard_silicon_init_params(FSP_S_CONFIG *silconfig)
+static void init_mainboard(void *chip_info)
{
carrier_gpio_configure();
+}
+void mainboard_silicon_init_params(FSP_S_CONFIG *silconfig)
+{
/*
* CPU Power Management Configuration correspond to the BIOS Setup menu settings
* in the AMI UEFI v112.
@@ -44,3 +48,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *silconfig)
silconfig->IoApicDeviceNumber = 0x1F;
silconfig->IoApicFunctionNumber = 0;
}
+
+struct chip_operations mainboard_ops = {
+ .init = init_mainboard,
+};