diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2023-01-25 11:53:15 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-02 14:41:31 +0000 |
| commit | 7f1f8302fd10bbd87920463a8ce871da11b09477 (patch) | |
| tree | 612b36bc19c155faed6c2932d9086e46b96de17d | |
| parent | 481bfe6a8b8ab500b10d1a7821796826c58e9e4a (diff) | |
mb/siemens/mc_ehl2: Set RGMII output impedance manually
Measurements have shown that the automatic calibrated values for RGMII
output impedances are too low. For this reason, set the PMOS value to 16
and the NMOS to 13.
Change-Id: Ic3382889d3281faccb03819f9680a9763703b2a1
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73019
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 758c8b1746..f14c225a0b 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -191,6 +191,9 @@ chip soc/intel/elkhartlake # INTn is routed to LED[2] pin register "enable_int" = "true" register "downshift_cnt" = "2" + register "force_mos" = "true" + register "pmos_val" = "0xF" + register "nmos_val" = "0xA" device mdio 0 on # PHY address ops m88e1512_ops end @@ -207,6 +210,9 @@ chip soc/intel/elkhartlake # INTn is routed to LED[2] pin register "enable_int" = "true" register "downshift_cnt" = "2" + register "force_mos" = "true" + register "pmos_val" = "0xF" + register "nmos_val" = "0xA" device mdio 1 on # PHY address ops m88e1512_ops end |