diff options
| author | Sukumar Ghorai <sukumar.ghorai@intel.com> | 2023-08-06 20:22:50 -0700 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-08-20 18:23:35 +0000 |
| commit | 2c40670fad5c20558bce0e52fce08f35a4db546b (patch) | |
| tree | 7a77346c75ac1909a93e2b94bf6cc8f730fd4223 | |
| parent | 5b87a85001c8a8bb0ba5fa7a06a8cb1a484bc36d (diff) | |
mb/intel/mtlrvp: Disable C1-state auto demotion for mtl-rvp
C1-state auto demotion feature allows hardware to determine C1-state
as per platform policy. Since platform sets performance policy to
balanced from hardware, auto demotion can be disabled without
performance impact.
Also, disabling this feature results soc to enter PC2 and lower
state in camera preview case and save platform power.
Note: C1 demotion heuristics used EPB parameter to balance between power
and performance, i.e. low threshold when EPB is low in-order to get C1
demotion faster and vice-versa. ChromeOS operates at default EPB=0x7
(low EPB) in both AC/DC, so in DC mode it gets more C1 demotion hits
than expected (similar to AC mode) and losing power respectively.
ref. https://review.coreboot.org/c/coreboot/+/76827
BUG=b:286328295
TEST=Code compiles and correct value of c1-state auto demotion is
passed to FSP. Also verified PC residency improvement ~10% in
camera preview case.
Change-Id: I1b2db634176f0072c535608c5600846a9086fef1
Signed-off-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
| -rw-r--r-- | src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb index f8f61a5611..17a92a8ef5 100644 --- a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb @@ -52,6 +52,9 @@ chip soc/intel/meteorlake # Enable S0ix register "s0ix_enable" = "1" + # Disable C1 C-state auto-demotion + register "disable_c1_state_auto_demotion" = "1" + # Enable energy reporting register "pch_pm_energy_report_enable" = "1" |