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authorMartin Roth <martinroth@google.com>2015-11-28 16:30:40 -0700
committerMartin Roth <martinroth@google.com>2015-12-03 21:53:32 +0100
commitc6a8d2ca7b80dc82f9a119379bff2106bcb6e405 (patch)
treee7e320d9319c3cb9be69076eb7df3980c0469511
parent99d05c74b6f32aa667364d5dd4b10b9e512acbb7 (diff)
intel/mohonpeak: Change SEABIOS_MALLOC_UPPERMEMORY to config_seabios
Instead of the SEABIOS_MALLOC_UPPERMEMORY option, use a saved SeaBIOS .config file to do the same thing. Change-Id: I29110a382b7770329ef938876426e571fbbbb339 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12569 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
-rw-r--r--src/mainboard/intel/mohonpeak/Kconfig8
-rw-r--r--src/mainboard/intel/mohonpeak/config_seabios5
2 files changed, 9 insertions, 4 deletions
diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig
index 8ea184b633..8f6e0773dc 100644
--- a/src/mainboard/intel/mohonpeak/Kconfig
+++ b/src/mainboard/intel/mohonpeak/Kconfig
@@ -71,10 +71,10 @@ config UART_FOR_CONSOLE
help
The Mohon Peak board uses COM2 (2f8) for the serial console.
-config SEABIOS_MALLOC_UPPERMEMORY
- bool
- default n
- help
+ config PAYLOAD_CONFIGFILE
+ string
+ default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios"
+ help
The Avoton/Rangeley chip does not allow devices to write into the 0xe000
segment. This means that USB/SATA devices will not work in SeaBIOS unless
we put the SeaBIOS buffer area down in the 0x9000 segment.
diff --git a/src/mainboard/intel/mohonpeak/config_seabios b/src/mainboard/intel/mohonpeak/config_seabios
new file mode 100644
index 0000000000..f688f2b530
--- /dev/null
+++ b/src/mainboard/intel/mohonpeak/config_seabios
@@ -0,0 +1,5 @@
+# The Avoton/Rangeley chip does not allow devices to write into the 0xe000
+# segment. This means that USB/SATA devices will not work in SeaBIOS unless
+# we put the SeaBIOS buffer area down in the 0x9000 segment.
+
+# CONFIG_MALLOC_UPPERMEMORY is not set